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#1 2017-05-19 17:14:58
- berniz95
- Member
- From: Vauréal France
- Registered: 2016-02-23
- Posts: 50
Battery on Toshiba laptop
Hello everyone,
I've installed Hydrogen on a Toshiba Satellite A100-788 (quite an old thing), most of it is fine now but I still have problems with functions that seem to be related with ACPI and kernel extensions. Hence my posting in this section.
Mainly, the battery is not recognised ("charging at 0 rate, will never fully charge"). Other issues such as not being able to tune the brightness are probably in the same scope, but less vital, so I first focus on the battery.
I have seen "solutions" in other forums such as this but nothing point-to-point applicable (for instance EMEM is missing in the disassembled DSDT file). I don't have enough notions in kernel management to make it through.
Can anyone tell me where to look for and what checking command lines I should try first ?
Last edited by berniz95 (2017-05-19 17:34:07)
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#2 2017-05-19 21:01:10
- Head_on_a_Stick
- Member
- From: London
- Registered: 2015-09-29
- Posts: 8,759
- Website
Re: Battery on Toshiba laptop
Can we see the output of:
acpi -VThat thread also suggests this fix but the link is down at the moment, hopefully they will get it up again soon:
“Et ignotas animum dimittit in artes.” — Ovid, Metamorphoses, VIII., 18.
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#3 2017-05-20 07:07:15
- berniz95
- Member
- From: Vauréal France
- Registered: 2016-02-23
- Posts: 50
Re: Battery on Toshiba laptop
% acpi -V
Battery 0: Charging, 0%, charging at zero rate - will never fully charge.
Battery 0: design capacity 4285 mAh, last full capacity 4285 mAh = 100%
Adapter 0: on-line
Thermal 0: ok, 39.0 degrees C
Thermal 0: trip point 0 switches to mode critical at temperature 96.0 degrees C
Thermal 1: ok, 44.0 degrees C
Thermal 1: trip point 0 switches to mode critical at temperature 106.0 degrees C
Cooling 0: Processor 0 of 10
Cooling 1: Processor 0 of 10
Cooling 2: Fan 0 of 1(edit) mmmhhh... I'm afraid I don't know how to update the firmware. I've looked for "firmware" in synaptic and everything is up to date in release 0.43. The BIOS is a Phoenix 1.90 but no entries allow to upgrade it either.
Last edited by berniz95 (2017-05-20 08:02:10)
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#4 2017-05-20 10:39:58
- Head_on_a_Stick
- Member
- From: London
- Registered: 2015-09-29
- Posts: 8,759
- Website
Re: Battery on Toshiba laptop
berniz95 wrote:
how to update the firmware
Download a new version from the motherboard manufacturer and apply it using FreeDOS (or Windows if you are so afflicted).
“Et ignotas animum dimittit in artes.” — Ovid, Metamorphoses, VIII., 18.
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#5 2017-05-20 11:11:14
- berniz95
- Member
- From: Vauréal France
- Registered: 2016-02-23
- Posts: 50
Re: Battery on Toshiba laptop
Mmhh... for some reason, this laptop is critical to me until the end of may. I guess updating the firmware would be reversible but I will try this in early june. Is there such a status as "frozen" or "sleeping beauty" ?
What does my acpi -V output tell you ? It seems to work in a way.
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#6 2017-05-20 11:32:35
- Head_on_a_Stick
- Member
- From: London
- Registered: 2015-09-29
- Posts: 8,759
- Website
Re: Battery on Toshiba laptop
berniz95 wrote:
What does my acpi -V output tell you ?
Not much 
EMEM is missing in the disassembled DSDT file
Please post the complete DSDT file, perhaps it is one of the other options.
Have you fiddled with it much? I can't really spoonfeed you here because I've never had to mess with ACPI stuff.
“Et ignotas animum dimittit in artes.” — Ovid, Metamorphoses, VIII., 18.
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#7 2017-05-20 11:58:59
- berniz95
- Member
- From: Vauréal France
- Registered: 2016-02-23
- Posts: 50
Re: Battery on Toshiba laptop
Here comes the file. I haven't fiddled with it at all, considering the required line was missing. (edit) Besides, the post I was refering to seems to be relevant when the kernel doesn't recognise the battery :
$ dmesg | grep batt
[ 1.370268] ACPI: Battery Slot [BAT1] (battery absent)But on my laptop it does :
$ dmesg |grep batt
[ 8.611715] ACPI: Battery Slot [BAT0] (battery present)I also downloaded the Bios update. I had to choose among different Windows OSes so I chose "OS independent". Yet I end up with a file named S10V600.exe. Shall I run it using an emulator such as Bochs ? I don't seem to have FreeDOS.
/*
* Intel ACPI Component Architecture
* AML Disassembler version 20140926-32 [Oct 1 2014]
* Copyright (c) 2000 - 2014 Intel Corporation
*
* Disassembly of DSDT.dat, Fri May 19 18:45:17 2017
*
* Original Table Header:
* Signature "DSDT"
* Length 0x000064FF (25855)
* Revision 0x01 **** 32-bit table (V1), no 64-bit math support
* Checksum 0x48
* OEM ID "TOSINV"
* OEM Table ID "CALISTGA"
* OEM Revision 0x06040000 (100925440)
* Compiler ID "INTL"
* Compiler Version 0x20050624 (537200164)
*/
DefinitionBlock ("DSDT.aml", "DSDT", 1, "TOSINV", "CALISTGA", 0x06040000)
{
External (CFGD, UnknownObj)
External (PDC0, UnknownObj)
External (PDC1, UnknownObj)
OperationRegion (PRT0, SystemIO, 0x80, One)
Field (PRT0, ByteAcc, Lock, Preserve)
{
PO80, 8
}
OperationRegion (IO_T, SystemIO, 0x0800, 0x10)
Field (IO_T, ByteAcc, NoLock, Preserve)
{
Offset (0x08),
TRP0, 8
}
OperationRegion (PMIO, SystemIO, 0x1000, 0x80)
Field (PMIO, ByteAcc, NoLock, Preserve)
{
Offset (0x42),
, 1,
GPEC, 1
}
OperationRegion (GPIO, SystemIO, 0x1180, 0x3C)
Field (GPIO, ByteAcc, NoLock, Preserve)
{
GU00, 8,
GU01, 8,
GU02, 8,
GU03, 8,
GIO0, 8,
GIO1, 8,
GIO2, 8,
GIO3, 8,
Offset (0x0C),
GL00, 8,
, 4,
GP12, 1,
GP13, 1,
GP14, 1,
GP15, 1,
, 3,
BTPW, 1,
Offset (0x0F),
GL03, 8,
Offset (0x18),
GB00, 8,
GB01, 8,
GB02, 8,
GB03, 8,
Offset (0x2C),
GIV0, 8,
GIV1, 8,
GIV2, 8,
GIV3, 8,
GU04, 8,
GU05, 8,
GU06, 8,
GU07, 8,
GIO4, 8,
GIO5, 8,
GIO6, 8,
GIO7, 8,
, 2,
BTRS, 1,
, 4,
GP39, 1,
GL05, 8,
GL06, 8,
GL07, 8
}
OperationRegion (GNVS, SystemMemory, 0x7FE86DBC, 0x0100)
Field (GNVS, AnyAcc, Lock, Preserve)
{
OSYS, 16,
SMIF, 8,
PRM0, 8,
PRM1, 8,
SCIF, 8,
PRM2, 8,
PRM3, 8,
LCKF, 8,
PRM4, 8,
PRM5, 8,
P80D, 32,
LIDS, 8,
PWRS, 8,
DBGS, 8,
Offset (0x14),
ACTT, 8,
PSVT, 8,
TC1V, 8,
TC2V, 8,
TSPV, 8,
CRTT, 8,
DTSE, 8,
DTS1, 8,
DTS2, 8,
FANS, 8,
BNUM, 8,
B0SC, 8,
B1SC, 8,
B2SC, 8,
B0SS, 8,
B1SS, 8,
B2SS, 8,
Offset (0x28),
APIC, 8,
MPEN, 8,
PPCS, 8,
PPCM, 8,
PCP0, 8,
PCP1, 8,
Offset (0x32),
NATP, 8,
CMAP, 8,
CMBP, 8,
LPTP, 8,
FDCP, 8,
CMCP, 8,
CIRP, 8,
Offset (0x3C),
IGDS, 8,
TLST, 8,
CADL, 8,
PADL, 8,
CSTE, 16,
NSTE, 16,
SSTE, 16,
NDID, 8,
DID1, 32,
DID2, 32,
DID3, 32,
DID4, 32,
DID5, 32,
Offset (0x67),
BLCS, 8,
BRTL, 8,
ALSE, 8,
ALAF, 8,
LLOW, 8,
LHIH, 8,
Offset (0x6E),
EMAE, 8,
EMAP, 16,
EMAL, 16,
Offset (0x74),
MEFE, 8,
Offset (0x78),
TPMP, 8,
TPME, 8,
Offset (0x82),
GTF0, 56,
GTF2, 56,
IDEM, 8,
DKID, 32,
LUXP, 1,
KBWK, 1
}
OperationRegion (RCRB, SystemMemory, 0xFED1C000, 0x4000)
Field (RCRB, DWordAcc, Lock, Preserve)
{
Offset (0x1000),
Offset (0x3000),
Offset (0x3404),
HPAS, 2,
, 5,
HPAE, 1,
Offset (0x3418),
, 1,
PATD, 1,
SATD, 1,
SMBD, 1,
HDAD, 1,
A97D, 1,
Offset (0x341A),
RP1D, 1,
RP2D, 1,
RP3D, 1,
RP4D, 1,
RP5D, 1,
RP6D, 1
}
OperationRegion (ECMB, SystemIO, 0x0400, 0x02)
Field (ECMB, ByteAcc, Lock, Preserve)
{
MIDX, 8,
MDAT, 8
}
IndexField (MIDX, MDAT, ByteAcc, Lock, Preserve)
{
Offset (0x85),
PMMD, 3,
Offset (0x86),
FNF5, 4,
EXTV, 1,
Offset (0x87),
DETD, 4,
IGDB, 2,
Offset (0x8C),
PARM, 8,
Offset (0x8F),
, 2,
DKAP, 1,
DSMD, 1,
VVEN, 1,
FLAS, 1,
S_AC, 1,
DKTY, 1,
Offset (0x91),
EVNT, 8,
Offset (0xA0),
BATS, 1,
LSER, 1,
LFIR, 1,
LLPT, 1,
LUSB, 1,
L394, 1,
LLAN, 1,
Offset (0xA1),
COMD, 8,
IND0, 8,
IND1, 8,
DAT0, 8,
DAT1, 8,
Offset (0xA9),
CLMT, 2,
, 3,
, 1,
POSE, 1,
FLAF, 1,
Offset (0xAC),
CTMP, 8
}
Name (ACPS, Zero)
Name (RTMP, One)
Name (TMPI, Zero)
Method (RDEC, 1, NotSerialized)
{
Acquire (\_SB.PCI0.LPCB.EC0.MUT1, 0xFFFF)
Sleep (0x0A)
Store (IND0, TMPI) /* \TMPI */
Store (Arg0, IND0) /* \IND0 */
Store (0x90, COMD) /* \COMD */
Sleep (0x0A)
If (COMD)
{
Sleep (0x0A)
}
If (COMD)
{
Sleep (0x0A)
}
If (COMD)
{
Sleep (0x0A)
}
If (COMD)
{
Sleep (0x0A)
}
If (COMD)
{
Sleep (0x0A)
}
If (COMD)
{
Sleep (0x0A)
}
Store (DAT0, Local0)
Store (TMPI, IND0) /* \IND0 */
Release (\_SB.PCI0.LPCB.EC0.MUT1)
Return (Local0)
}
Method (WREC, 2, NotSerialized)
{
Acquire (\_SB.PCI0.LPCB.EC0.MUT1, 0xFFFF)
Sleep (0x0A)
Store (IND0, TMPI) /* \TMPI */
Store (Arg0, IND0) /* \IND0 */
Store (Arg1, DAT0) /* \DAT0 */
Store (0x91, COMD) /* \COMD */
Sleep (0x0A)
If (COMD)
{
Sleep (0x0A)
}
If (COMD)
{
Sleep (0x0A)
}
If (COMD)
{
Sleep (0x0A)
}
If (COMD)
{
Sleep (0x0A)
}
If (COMD)
{
Sleep (0x0A)
}
If (COMD)
{
Sleep (0x0A)
}
Store (TMPI, IND0) /* \IND0 */
Release (\_SB.PCI0.LPCB.EC0.MUT1)
}
Mutex (MUTX, 0x00)
Name (_S0, Package (0x03) // _S0_: S0 System State
{
Zero,
Zero,
Zero
})
Name (_S3, Package (0x03) // _S3_: S3 System State
{
0x05,
0x05,
Zero
})
Name (_S4, Package (0x03) // _S4_: S4 System State
{
0x06,
0x06,
Zero
})
Name (_S5, Package (0x03) // _S5_: S5 System State
{
0x07,
0x07,
Zero
})
Scope (_PR)
{
Processor (CPU0, 0x00, 0x00001010, 0x06) {}
Processor (CPU1, 0x01, 0x00001010, 0x06) {}
}
Name (DSEN, One)
Name (ECON, Zero)
Name (GPIC, Zero)
Name (CTYP, Zero)
Name (L01C, Zero)
Name (VFN0, Zero)
Method (_PIC, 1, NotSerialized) // _PIC: Interrupt Model
{
Store (Arg0, GPIC) /* \GPIC */
}
Method (_PTS, 1, NotSerialized) // _PTS: Prepare To Sleep
{
Store (0x50, PO80) /* \PO80 */
Store (Arg0, PMMD) /* \PMMD */
Store (Zero, \_SB.LID1)
Store (0x9A, SMIF) /* \SMIF */
Store (Zero, TRP0) /* \TRP0 */
If (LEqual (Arg0, 0x05))
{
Store (Zero, PRM0) /* \PRM0 */
Store (0x8A, SMIF) /* \SMIF */
Store (Zero, TRP0) /* \TRP0 */
}
If (LEqual (Arg0, 0x03))
{
Store (0x13, PRM0) /* \PRM0 */
Store (0x8A, SMIF) /* \SMIF */
Store (Zero, TRP0) /* \TRP0 */
If (KBWK)
{
Store (One, \_SB.PCI0.LPCB.EC0.WKKY)
}
Else
{
Store (Zero, \_SB.PCI0.LPCB.EC0.WKKY)
}
Store (One, \_SB.PCI0.LPCB.EC0.WKLD)
If (\_SB.CKDK ())
{
Store (One, \_SB.WUDK)
}
}
If (LEqual (Arg0, 0x04))
{
Store (One, \_SB.PCI0.LPCB.EC0.SWI4)
Store (0x14, PRM0) /* \PRM0 */
Store (0x8A, SMIF) /* \SMIF */
Store (Zero, TRP0) /* \TRP0 */
If (\_SB.CKDK ())
{
Store (One, \_SB.WUDK)
}
}
}
Method (_WAK, 1, NotSerialized) // _WAK: Wake
{
If (LOr (LEqual (Arg0, 0x03), LEqual (Arg0, 0x04)))
{
If (And (CFGD, 0x01000000))
{
If (LAnd (And (CFGD, 0xF0), LEqual (OSYS, 0x07D1)))
{
TRAP (0x3D)
}
}
}
Notify (\_SB.BAT0, 0x81) // Information Change
Notify (\_SB.PCI0.USB1, Zero) // Bus Check
Notify (\_SB.PCI0.USB2, Zero) // Bus Check
Notify (\_SB.PCI0.USB3, Zero) // Bus Check
Notify (\_SB.PCI0.USB4, Zero) // Bus Check
If (LEqual (RP2D, Zero))
{
Notify (\_SB.PCI0.RP02, Zero) // Bus Check
}
If (LEqual (RP3D, Zero))
{
Notify (\_SB.PCI0.RP03, Zero) // Bus Check
}
Store (One, BTPW) /* \BTPW */
Store (Zero, BTRS) /* \BTRS */
If (LEqual (Arg0, 0x03))
{
Store (\_SB.PCI0.LPCB.EC0.BLEC, Local2)
If (Local2)
{
Store (Zero, \_SB.PCI0.LPCB.EC0.BLEC)
Store (0x28, EVNT) /* \EVNT */
}
TRAP (0x46)
Store (0x8B, SMIF) /* \SMIF */
Store (Zero, TRP0) /* \TRP0 */
}
If (LEqual (Arg0, 0x04))
{
If (DTSE)
{
TRAP (0x47)
}
Notify (\_TZ.TZ00, 0x80) // Thermal Status Change
Notify (\_TZ.TZ01, 0x80) // Thermal Status Change
If (LEqual (OSYS, 0x07D2))
{
If (And (CFGD, One))
{
If (LGreater (PPCS, Zero))
{
Subtract (PPCS, One, PPCS) /* \PPCS */
PNOT ()
Add (PPCS, One, PPCS) /* \PPCS */
PNOT ()
}
Else
{
Add (PPCS, One, PPCS) /* \PPCS */
PNOT ()
Subtract (PPCS, One, PPCS) /* \PPCS */
PNOT ()
}
}
}
}
If (LEqual (Arg0, 0x04))
{
Store (\_SB.PCI0.LPCB.EC0.WKSV, Local0)
If (LNotEqual (Local0, Zero))
{
Notify (\_SB.PWRB, 0x02) // Device Wake
}
}
Store (One, \_SB.LID1)
Store (0x9A, SMIF) /* \SMIF */
Store (Zero, TRP0) /* \TRP0 */
Store (Zero, \_SB.PCI0.LPCB.EC0.WKLD)
If (DKAP)
{
If (\_SB.WUDK)
{
Store (One, PARM) /* \PARM */
Store (Zero, \_SB.WUDK)
}
Else
{
Store (Zero, PARM) /* \PARM */
}
}
Store (0x93, SMIF) /* \SMIF */
Store (Zero, TRP0) /* \TRP0 */
Store (Zero, \_SB.PCI0.LPCB.EC0.BTON)
Store (Zero, \_SB.PCI0.LPCB.EC0.BION)
Store (0x30, PO80) /* \PO80 */
Return (Package (0x02)
{
Zero,
Zero
})
}
Scope (_GPE)
{
Method (_L01, 0, NotSerialized) // _Lxx: Level-Triggered GPE
{
Add (L01C, One, L01C) /* \L01C */
Sleep (0x64)
If (LAnd (LEqual (RP1D, Zero), \_SB.PCI0.RP01.HPCS))
{
If (\_SB.PCI0.RP01.PDC1)
{
Store (One, \_SB.PCI0.RP01.PDC1)
Store (One, \_SB.PCI0.RP01.HPCS)
Notify (\_SB.PCI0.RP01, Zero) // Bus Check
}
Else
{
Store (One, \_SB.PCI0.RP01.HPCS)
}
}
If (LAnd (LEqual (RP2D, Zero), \_SB.PCI0.RP02.HPCS))
{
If (\_SB.PCI0.RP02.PDC2)
{
Store (One, \_SB.PCI0.RP02.PDC2)
Store (One, \_SB.PCI0.RP02.HPCS)
Notify (\_SB.PCI0.RP02, Zero) // Bus Check
}
Else
{
Store (One, \_SB.PCI0.RP02.HPCS)
}
}
If (LAnd (LEqual (RP3D, Zero), \_SB.PCI0.RP03.HPCS))
{
If (\_SB.PCI0.RP03.PDC3)
{
Store (One, \_SB.PCI0.RP03.PDC3)
Store (One, \_SB.PCI0.RP03.HPCS)
Notify (\_SB.PCI0.RP03, Zero) // Bus Check
}
Else
{
Store (One, \_SB.PCI0.RP03.HPCS)
}
}
}
Method (_L02, 0, NotSerialized) // _Lxx: Level-Triggered GPE
{
Store (Zero, GPEC) /* \GPEC */
Notify (\_TZ.TZ00, 0x80) // Thermal Status Change
Notify (\_TZ.TZ01, 0x80) // Thermal Status Change
}
Method (_L03, 0, NotSerialized) // _Lxx: Level-Triggered GPE
{
Notify (\_SB.PCI0.USB1, 0x02) // Device Wake
}
Method (_L04, 0, NotSerialized) // _Lxx: Level-Triggered GPE
{
Notify (\_SB.PCI0.USB2, 0x02) // Device Wake
}
Method (_L05, 0, NotSerialized) // _Lxx: Level-Triggered GPE
{
If (HDAD) {}
Else
{
Notify (\_SB.PCI0.HDEF, 0x02) // Device Wake
}
}
Method (_L09, 0, NotSerialized) // _Lxx: Level-Triggered GPE
{
If (\_SB.PCI0.RP01.PSP1)
{
Store (One, \_SB.PCI0.RP01.PSP1)
Store (One, \_SB.PCI0.RP01.PMCS)
Notify (\_SB.PCI0.RP01, 0x02) // Device Wake
}
If (\_SB.PCI0.RP02.PSP2)
{
Store (One, \_SB.PCI0.RP02.PSP2)
Store (One, \_SB.PCI0.RP02.PMCS)
Notify (\_SB.PCI0.RP02, 0x02) // Device Wake
}
If (\_SB.PCI0.RP03.PSP3)
{
Store (One, \_SB.PCI0.RP03.PSP3)
Store (One, \_SB.PCI0.RP03.PMCS)
Notify (\_SB.PCI0.RP03, 0x02) // Device Wake
}
}
Method (_L0B, 0, NotSerialized) // _Lxx: Level-Triggered GPE
{
Notify (\_SB.PCI0.PCIB, 0x02) // Device Wake
}
Method (_L0C, 0, NotSerialized) // _Lxx: Level-Triggered GPE
{
Notify (\_SB.PCI0.USB3, 0x02) // Device Wake
}
Method (_L0D, 0, NotSerialized) // _Lxx: Level-Triggered GPE
{
Notify (\_SB.PCI0.USB7, 0x02) // Device Wake
}
Method (_L0E, 0, NotSerialized) // _Lxx: Level-Triggered GPE
{
Notify (\_SB.PCI0.USB4, 0x02) // Device Wake
}
Method (_L19, 0, NotSerialized) // _Lxx: Level-Triggered GPE
{
Notify (\_SB.LID, 0x80) // Status Change
}
}
Method (GETB, 3, Serialized)
{
Multiply (Arg0, 0x08, Local0)
Multiply (Arg1, 0x08, Local1)
CreateField (Arg2, Local0, Local1, TBF3)
Return (TBF3) /* \GETB.TBF3 */
}
Method (HKDS, 1, Serialized)
{
If (LEqual (Zero, DSEN))
{
If (LEqual (TRAP (Arg0), Zero))
{
If (LNotEqual (CADL, PADL))
{
Store (CADL, PADL) /* \PADL */
If (LGreaterEqual (OSYS, 0x07D1))
{
Notify (\_SB.PCI0, Zero) // Bus Check
}
Else
{
Notify (\_SB.PCI0.GFX0, Zero) // Bus Check
}
Sleep (0x02EE)
}
Notify (\_SB.PCI0.GFX0, 0x80) // Status Change
}
}
If (LEqual (One, DSEN))
{
If (LEqual (TRAP (Increment (Arg0)), Zero))
{
Notify (\_SB.PCI0.GFX0, 0x81) // Information Change
}
}
}
Method (LSDS, 1, Serialized)
{
If (Arg0)
{
HKDS (0x0C)
}
Else
{
HKDS (0x0E)
}
If (LNotEqual (DSEN, One))
{
Sleep (0x32)
While (LEqual (DSEN, 0x02))
{
Sleep (0x32)
}
}
}
Method (PNOT, 0, Serialized)
{
If (MPEN)
{
If (And (PDC0, 0x08))
{
Notify (\_PR.CPU0, 0x80) // Performance Capability Change
If (And (PDC0, 0x10))
{
Sleep (0xC8)
Notify (\_PR.CPU0, 0x81) // C-State Change
}
}
If (And (PDC1, 0x08))
{
Notify (\_PR.CPU1, 0x80) // Performance Capability Change
If (And (PDC1, 0x10))
{
Sleep (0xC8)
Notify (\_PR.CPU1, 0x81) // C-State Change
}
}
}
Else
{
Notify (\_PR.CPU0, 0x80) // Performance Capability Change
Sleep (0xC8)
Notify (\_PR.CPU0, 0x81) // C-State Change
}
}
Method (TRAP, 1, Serialized)
{
Store (Arg0, SMIF) /* \SMIF */
Store (Zero, TRP0) /* \TRP0 */
Return (SMIF) /* \SMIF */
}
Name (DFEC, Zero)
Scope (_TZ)
{
PowerResource (FN00, 0x00, 0x0000)
{
Method (_STA, 0, Serialized) // _STA: Status
{
If (LEqual (FANS, Zero))
{
Return (Zero)
}
Else
{
Return (One)
}
}
Method (_ON, 0, Serialized) // _ON_: Power On
{
}
Method (_OFF, 0, Serialized) // _OFF: Power Off
{
}
}
Device (FAN0)
{
Name (_HID, EisaId ("PNP0C0B") /* Fan (Thermal Solution) */) // _HID: Hardware ID
Name (_UID, Zero) // _UID: Unique ID
Name (_PR0, Package (0x01) // _PR0: Power Resources for D0
{
FN00
})
}
ThermalZone (TZ00)
{
Method (_CRT, 0, Serialized) // _CRT: Critical Temperature
{
Return (0x0ED0)
}
Method (_TMP, 0, Serialized) // _TMP: Temperature
{
Store (CTMP, Local0)
If (And (Local0, 0x80))
{
Subtract (Local0, 0x0100, Local0)
}
Return (Add (0x0AAC, Multiply (Local0, 0x0A)))
}
}
ThermalZone (TZ01)
{
Method (_AC0, 0, Serialized) // _ACx: Active Cooling
{
Return (Add (0x0AAC, Multiply (ACTT, 0x0A)))
}
Name (_AL0, Package (0x01) // _ALx: Active List
{
FAN0
})
Method (_CRT, 0, Serialized) // _CRT: Critical Temperature
{
If (DTSE)
{
Return (Add (0x0AAC, Multiply (CRTT, 0x0A)))
}
Return (0x0ED0)
}
Method (_SCP, 1, Serialized) // _SCP: Set Cooling Policy
{
Store (Arg0, CTYP) /* \CTYP */
}
Method (_TMP, 0, Serialized) // _TMP: Temperature
{
If (DTSE)
{
If (LEqual (RTMP, One))
{
Store (0x87, SMIF) /* \SMIF */
Store (Zero, TRP0) /* \TRP0 */
}
Store (One, RTMP) /* \RTMP */
If (LGreaterEqual (DTS1, DTS2))
{
Return (Add (0x0AAC, Multiply (DTS1, 0x0A)))
}
Return (Add (0x0AAC, Multiply (DTS2, 0x0A)))
}
Return (0x0BB8)
}
Method (_PSL, 0, Serialized) // _PSL: Passive List
{
If (MPEN)
{
Return (Package (0x02)
{
\_PR.CPU0,
\_PR.CPU1
})
}
Return (Package (0x01)
{
\_PR.CPU0
})
}
Method (_PSV, 0, Serialized) // _PSV: Passive Temperature
{
Return (Add (0x0AAC, Multiply (PSVT, 0x0A)))
}
Method (_TSP, 0, Serialized) // _TSP: Thermal Sampling Period
{
Return (0x96)
}
}
}
Method (GETP, 1, Serialized)
{
If (LEqual (And (Arg0, 0x09), Zero))
{
Return (Ones)
}
If (LEqual (And (Arg0, 0x09), 0x08))
{
Return (0x0384)
}
ShiftRight (And (Arg0, 0x0300), 0x08, Local0)
ShiftRight (And (Arg0, 0x3000), 0x0C, Local1)
Return (Multiply (0x1E, Subtract (0x09, Add (Local0, Local1))
))
}
Method (GDMA, 5, Serialized)
{
If (Arg0)
{
If (LAnd (Arg1, Arg4))
{
Return (0x14)
}
If (LAnd (Arg2, Arg4))
{
Return (Multiply (Subtract (0x04, Arg3), 0x0F))
}
Return (Multiply (Subtract (0x04, Arg3), 0x1E))
}
Return (Ones)
}
Method (GETT, 1, Serialized)
{
Return (Multiply (0x1E, Subtract (0x09, Add (And (ShiftRight (Arg0, 0x02
), 0x03), And (Arg0, 0x03)))))
}
Method (GETF, 3, Serialized)
{
Name (TMPF, Zero)
If (Arg0)
{
Or (TMPF, One, TMPF) /* \GETF.TMPF */
}
If (And (Arg2, 0x02))
{
Or (TMPF, 0x02, TMPF) /* \GETF.TMPF */
}
If (Arg1)
{
Or (TMPF, 0x04, TMPF) /* \GETF.TMPF */
}
If (And (Arg2, 0x20))
{
Or (TMPF, 0x08, TMPF) /* \GETF.TMPF */
}
If (And (Arg2, 0x4000))
{
Or (TMPF, 0x10, TMPF) /* \GETF.TMPF */
}
Return (TMPF) /* \GETF.TMPF */
}
Method (SETP, 3, Serialized)
{
If (LGreater (Arg0, 0xF0))
{
Return (0x08)
}
Else
{
If (And (Arg1, 0x02))
{
If (LAnd (LLessEqual (Arg0, 0x78), And (Arg2, 0x02)))
{
Return (0x2301)
}
If (LAnd (LLessEqual (Arg0, 0xB4), And (Arg2, One)))
{
Return (0x2101)
}
}
Return (0x1001)
}
}
Method (SDMA, 1, Serialized)
{
If (LLessEqual (Arg0, 0x14))
{
Return (One)
}
If (LLessEqual (Arg0, 0x1E))
{
Return (0x02)
}
If (LLessEqual (Arg0, 0x2D))
{
Return (One)
}
If (LLessEqual (Arg0, 0x3C))
{
Return (0x02)
}
If (LLessEqual (Arg0, 0x5A))
{
Return (One)
}
Return (Zero)
}
Method (SETT, 3, Serialized)
{
If (And (Arg1, 0x02))
{
If (LAnd (LLessEqual (Arg0, 0x78), And (Arg2, 0x02)))
{
Return (0x0B)
}
If (LAnd (LLessEqual (Arg0, 0xB4), And (Arg2, One)))
{
Return (0x09)
}
}
Return (0x04)
}
Scope (_SB)
{
Method (_INI, 0, NotSerialized) // _INI: Initialize
{
If (DTSE)
{
TRAP (0x47)
Store (0x95, SMIF) /* \SMIF */
Store (Zero, TRP0) /* \TRP0 */
}
Store (0x07D0, OSYS) /* \OSYS */
If (CondRefOf (_OSI, Local0))
{
If (_OSI ("Linux"))
{
Store (0x03E8, OSYS) /* \OSYS */
}
If (_OSI ("Windows 2001"))
{
Store (0x07D1, OSYS) /* \OSYS */
}
If (_OSI ("Windows 2001 SP1"))
{
Store (0x07D1, OSYS) /* \OSYS */
}
If (_OSI ("Windows 2001 SP2"))
{
Store (0x07D2, OSYS) /* \OSYS */
}
If (_OSI ("Windows 2006"))
{
Store (0x07D6, OSYS) /* \OSYS */
}
If (LAnd (MPEN, LEqual (OSYS, 0x07D1)))
{
TRAP (0x3D)
}
}
If (LGreaterEqual (OSYS, 0x07D0))
{
Store (One, PRM0) /* \PRM0 */
If (LGreaterEqual (OSYS, 0x07D1))
{
Store (0x03, PRM0) /* \PRM0 */
}
}
Else
{
Store (Zero, PRM0) /* \PRM0 */
}
TRAP (0x32)
}
Name (LID1, Zero)
Name (LIDF, One)
Name (UNDK, One)
Name (WUDK, Zero)
Device (LID)
{
Name (_HID, EisaId ("PNP0C0D") /* Lid Device */) // _HID: Hardware ID
Method (_LID, 0, NotSerialized) // _LID: Lid Status
{
Store (LIDF, LID1) /* \_SB_.LID1 */
Return (LIDF) /* \_SB_.LIDF */
}
}
Device (BAT0)
{
Name (_HID, EisaId ("PNP0C0A") /* Control Method Battery */) // _HID: Hardware ID
Name (_UID, One) // _UID: Unique ID
Name (_PCL, Package (0x01) // _PCL: Power Consumer List
{
_SB
})
Name (PBIF, Package (0x0D)
{
One,
0x10CC,
0x10CC,
One,
0x3A98,
Zero,
Zero,
Zero,
Zero,
"Main",
"0000",
"Li-ion",
""
})
Name (PBST, Package (0x04)
{
One,
0x0A90,
0x1000,
0x2A30
})
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (^^PCI0.LPCB.EC0.ECOK)
{
If (BATS)
{
Return (0x1F)
}
Else
{
Return (0x0F)
}
}
Else
{
Return (0x1F)
}
}
Name (SERB, "0000")
Mutex (MUT2, 0x00)
Method (_BIF, 0, NotSerialized) // _BIF: Battery Information
{
Acquire (MUT2, 0xFFFF)
If (^^PCI0.LPCB.EC0.ECOK)
{
Store (^^PCI0.LPCB.EC0.B1FL, Local0)
Store (^^PCI0.LPCB.EC0.B1FH, Local5)
ShiftLeft (Local5, 0x08, Local5)
Add (Local0, Local5, Local0)
Store (^^PCI0.LPCB.EC0.B1DL, Local1)
Store (^^PCI0.LPCB.EC0.B1DH, Local5)
ShiftLeft (Local5, 0x08, Local5)
Add (Local1, Local5, Local1)
Store (Local1, Index (PBIF, One))
Store (Local0, Index (PBIF, 0x02))
Store (0x3A98, Index (PBIF, 0x04))
Store (Local0, Index (PBIF, 0x08))
Store (^^PCI0.LPCB.EC0.BCEL, Local0)
If (LEqual (Local0, 0x03))
{
Store ("PA3478U-1BAS/BRS", Index (PBIF, 0x09))
}
Else
{
If (LEqual (Local0, 0x02))
{
Store ("PA3399U-2BAS/BRS", Index (PBIF, 0x09))
}
Else
{
If (LEqual (Local0, One))
{
Store ("PA3400U-1BAS/BRS", Index (PBIF, 0x09))
}
Else
{
Store ("PA3451U-1BAS/BRS", Index (PBIF, 0x09))
}
}
}
Store (^^PCI0.LPCB.EC0.B1SL, Local0)
Store (^^PCI0.LPCB.EC0.B1SH, Local5)
ShiftLeft (Local5, 0x08, Local5)
Add (Local0, Local5, Local0)
Store (ITOS (Local0), Local1)
Store (Local1, Index (PBIF, 0x0A))
Release (MUT2)
}
Return (PBIF) /* \_SB_.BAT0.PBIF */
}
Method (_BST, 0, NotSerialized) // _BST: Battery Status
{
Acquire (MUT2, 0xFFFF)
If (FLAS)
{
Store (One, Index (PBST, Zero))
Store (0x78, Index (PBST, One))
Store (0x0BB8, Index (PBST, 0x02))
Store (0x3A98, Index (PBST, 0x03))
Release (MUT2)
Return (PBST) /* \_SB_.BAT0.PBST */
}
Else
{
If (^^PCI0.LPCB.EC0.ECOK)
{
Store (^^PCI0.LPCB.EC0.B1CG, Local1)
Store (^^PCI0.LPCB.EC0.B1DC, Local0)
ShiftLeft (Local1, One, Local2)
Or (Local0, Local2, Local3)
Store (^^PCI0.LPCB.EC0.BPRH, Local2)
Multiply (Local2, 0x0100, Local1)
Store (^^PCI0.LPCB.EC0.BPRH, Local0)
Add (Local1, Local0, Local1)
Store (Local1, Index (PBST, One))
Store (^^PCI0.LPCB.EC0.B1PT, Local0)
If (LLess (Local0, 0x0F))
{
Or (Local3, 0x04, Local3)
}
Store (Local3, Index (PBST, Zero))
Store (DerefOf (Index (PBIF, 0x02)), Local1)
Multiply (Local1, Local0, Local2)
Divide (Local2, 0x64, Local3, Local2)
Add (Local2, 0x0A, Local2)
Store (Local2, Index (PBST, 0x02))
Store (DerefOf (Index (PBIF, 0x04)), Local3)
Store (Local3, Index (PBST, 0x03))
}
Else
{
Store (One, Index (PBST, Zero))
Store (0x78, Index (PBST, One))
Store (0x0BB8, Index (PBST, 0x02))
Store (0x3A98, Index (PBST, 0x03))
}
Release (MUT2)
Return (PBST) /* \_SB_.BAT0.PBST */
}
}
}
Method (ITOS, 1, NotSerialized)
{
Store ("", Local0)
Store (0x04, Local1)
While (Local1)
{
Decrement (Local1)
And (ShiftRight (Arg0, ShiftLeft (Local1, 0x02)), 0x0F, Local4)
Store (DerefOf (Index (CHAR, Local4)), Local2)
Concatenate (Local0, Local2, Local5)
Store (Local5, Local0)
}
Return (Local0)
}
Name (CHAR, Package (0x10)
{
"0",
"1",
"2",
"3",
"4",
"5",
"6",
"7",
"8",
"9",
"A",
"B",
"C",
"D",
"E",
"F"
})
Device (ADP0)
{
Name (_PCL, Package (0x01) // _PCL: Power Consumer List
{
_SB
})
Name (_HID, "ACPI0003" /* Power Source Device */) // _HID: Hardware ID
Method (_PSR, 0, NotSerialized) // _PSR: Power Source
{
If (FLAS)
{
Return (One)
}
Else
{
If (^^PCI0.LPCB.EC0.ECOK)
{
Store (^^PCI0.LPCB.EC0.ACST, Local0)
If (Local0)
{
Store (One, PWRS) /* \PWRS */
Return (One)
}
Else
{
Store (Zero, PWRS) /* \PWRS */
Return (Zero)
}
}
Else
{
Return (One)
}
}
}
Method (_STA, 0, NotSerialized) // _STA: Status
{
Return (0x0F)
}
}
Device (PWRB)
{
Name (_HID, EisaId ("PNP0C0C") /* Power Button Device */) // _HID: Hardware ID
Method (_STA, 0, NotSerialized) // _STA: Status
{
Return (0x0B)
}
}
Device (PCI0)
{
Name (_HID, EisaId ("PNP0A08") /* PCI Express Bus */) // _HID: Hardware ID
Name (_CID, EisaId ("PNP0A03") /* PCI Bus */) // _CID: Compatible ID
Name (_ADR, Zero) // _ADR: Address
Name (_BBN, Zero) // _BBN: BIOS Bus Number
OperationRegion (HBUS, PCI_Config, 0x40, 0xC0)
Field (HBUS, DWordAcc, NoLock, Preserve)
{
Offset (0x50),
, 4,
PM0H, 2,
Offset (0x51),
PM1L, 2,
, 2,
PM1H, 2,
Offset (0x52),
PM2L, 2,
, 2,
PM2H, 2,
Offset (0x53),
PM3L, 2,
, 2,
PM3H, 2,
Offset (0x54),
PM4L, 2,
, 2,
PM4H, 2,
Offset (0x55),
PM5L, 2,
, 2,
PM5H, 2,
Offset (0x56),
PM6L, 2,
, 2,
PM6H, 2,
Offset (0x57),
, 7,
HENA, 1,
Offset (0x5C),
, 3,
TOUD, 5
}
Name (BUF0, ResourceTemplate ()
{
WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode,
0x0000, // Granularity
0x0000, // Range Minimum
0x00FF, // Range Maximum
0x0000, // Translation Offset
0x0100, // Length
,, )
DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
0x00000000, // Granularity
0x00000000, // Range Minimum
0x00000CF7, // Range Maximum
0x00000000, // Translation Offset
0x00000CF8, // Length
,, , TypeStatic)
IO (Decode16,
0x0CF8, // Range Minimum
0x0CF8, // Range Maximum
0x01, // Alignment
0x08, // Length
)
DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
0x00000000, // Granularity
0x00000D00, // Range Minimum
0x0000FFFF, // Range Maximum
0x00000000, // Translation Offset
0x0000F300, // Length
,, , TypeStatic)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0x00000000, // Granularity
0x000A0000, // Range Minimum
0x000BFFFF, // Range Maximum
0x00000000, // Translation Offset
0x00020000, // Length
,, , AddressRangeMemory, TypeStatic)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0x00000000, // Granularity
0x000C0000, // Range Minimum
0x000C3FFF, // Range Maximum
0x00000000, // Translation Offset
0x00004000, // Length
,, _Y00, AddressRangeMemory, TypeStatic)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0x00000000, // Granularity
0x000C4000, // Range Minimum
0x000C7FFF, // Range Maximum
0x00000000, // Translation Offset
0x00004000, // Length
,, _Y01, AddressRangeMemory, TypeStatic)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0x00000000, // Granularity
0x000C8000, // Range Minimum
0x000CBFFF, // Range Maximum
0x00000000, // Translation Offset
0x00004000, // Length
,, _Y02, AddressRangeMemory, TypeStatic)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0x00000000, // Granularity
0x000CC000, // Range Minimum
0x000CFFFF, // Range Maximum
0x00000000, // Translation Offset
0x00004000, // Length
,, _Y03, AddressRangeMemory, TypeStatic)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0x00000000, // Granularity
0x000D0000, // Range Minimum
0x000D3FFF, // Range Maximum
0x00000000, // Translation Offset
0x00004000, // Length
,, _Y04, AddressRangeMemory, TypeStatic)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0x00000000, // Granularity
0x000D4000, // Range Minimum
0x000D7FFF, // Range Maximum
0x00000000, // Translation Offset
0x00004000, // Length
,, _Y05, AddressRangeMemory, TypeStatic)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0x00000000, // Granularity
0x000D8000, // Range Minimum
0x000DBFFF, // Range Maximum
0x00000000, // Translation Offset
0x00004000, // Length
,, _Y06, AddressRangeMemory, TypeStatic)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0x00000000, // Granularity
0x000DC000, // Range Minimum
0x000DFFFF, // Range Maximum
0x00000000, // Translation Offset
0x00004000, // Length
,, _Y07, AddressRangeMemory, TypeStatic)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0x00000000, // Granularity
0x000E0000, // Range Minimum
0x000E3FFF, // Range Maximum
0x00000000, // Translation Offset
0x00004000, // Length
,, _Y08, AddressRangeMemory, TypeStatic)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0x00000000, // Granularity
0x000E4000, // Range Minimum
0x000E7FFF, // Range Maximum
0x00000000, // Translation Offset
0x00004000, // Length
,, _Y09, AddressRangeMemory, TypeStatic)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0x00000000, // Granularity
0x000E8000, // Range Minimum
0x000EBFFF, // Range Maximum
0x00000000, // Translation Offset
0x00004000, // Length
,, _Y0A, AddressRangeMemory, TypeStatic)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0x00000000, // Granularity
0x000EC000, // Range Minimum
0x000EFFFF, // Range Maximum
0x00000000, // Translation Offset
0x00004000, // Length
,, _Y0B, AddressRangeMemory, TypeStatic)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0x00000000, // Granularity
0x000F0000, // Range Minimum
0x000FFFFF, // Range Maximum
0x00000000, // Translation Offset
0x00010000, // Length
,, _Y0C, AddressRangeMemory, TypeStatic)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0x00000000, // Granularity
0x00000000, // Range Minimum
0xFEBFFFFF, // Range Maximum
0x00000000, // Translation Offset
0x00000000, // Length
,, _Y0D, AddressRangeMemory, TypeStatic)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0x00000000, // Granularity
0xFED40000, // Range Minimum
0xFED44FFF, // Range Maximum
0x00000000, // Translation Offset
0x00005000, // Length
,, _Y0E, AddressRangeMemory, TypeStatic)
})
Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
{
If (PM1L)
{
CreateDWordField (BUF0, \_SB.PCI0._Y00._LEN, C0LN) // _LEN: Length
Store (Zero, C0LN) /* \_SB_.PCI0._CRS.C0LN */
}
If (LEqual (PM1L, One))
{
CreateBitField (BUF0, \_SB.PCI0._Y00._RW, C0RW) // _RW_: Read-Write Status
Store (Zero, C0RW) /* \_SB_.PCI0._CRS.C0RW */
}
If (PM1H)
{
CreateDWordField (BUF0, \_SB.PCI0._Y01._LEN, C4LN) // _LEN: Length
Store (Zero, C4LN) /* \_SB_.PCI0._CRS.C4LN */
}
If (LEqual (PM1H, One))
{
CreateBitField (BUF0, \_SB.PCI0._Y01._RW, C4RW) // _RW_: Read-Write Status
Store (Zero, C4RW) /* \_SB_.PCI0._CRS.C4RW */
}
If (PM2L)
{
CreateDWordField (BUF0, \_SB.PCI0._Y02._LEN, C8LN) // _LEN: Length
Store (Zero, C8LN) /* \_SB_.PCI0._CRS.C8LN */
}
If (LEqual (PM2L, One))
{
CreateBitField (BUF0, \_SB.PCI0._Y02._RW, C8RW) // _RW_: Read-Write Status
Store (Zero, C8RW) /* \_SB_.PCI0._CRS.C8RW */
}
If (PM2H)
{
CreateDWordField (BUF0, \_SB.PCI0._Y03._LEN, CCLN) // _LEN: Length
Store (Zero, CCLN) /* \_SB_.PCI0._CRS.CCLN */
}
If (LEqual (PM2H, One))
{
CreateBitField (BUF0, \_SB.PCI0._Y03._RW, CCRW) // _RW_: Read-Write Status
Store (Zero, CCRW) /* \_SB_.PCI0._CRS.CCRW */
}
If (PM3L)
{
CreateDWordField (BUF0, \_SB.PCI0._Y04._LEN, D0LN) // _LEN: Length
Store (Zero, D0LN) /* \_SB_.PCI0._CRS.D0LN */
}
If (LEqual (PM3L, One))
{
CreateBitField (BUF0, \_SB.PCI0._Y04._RW, D0RW) // _RW_: Read-Write Status
Store (Zero, D0RW) /* \_SB_.PCI0._CRS.D0RW */
}
If (PM3H)
{
CreateDWordField (BUF0, \_SB.PCI0._Y05._LEN, D4LN) // _LEN: Length
Store (Zero, D4LN) /* \_SB_.PCI0._CRS.D4LN */
}
If (LEqual (PM3H, One))
{
CreateBitField (BUF0, \_SB.PCI0._Y05._RW, D4RW) // _RW_: Read-Write Status
Store (Zero, D4RW) /* \_SB_.PCI0._CRS.D4RW */
}
If (PM4L)
{
CreateDWordField (BUF0, \_SB.PCI0._Y06._LEN, D8LN) // _LEN: Length
Store (Zero, D8LN) /* \_SB_.PCI0._CRS.D8LN */
}
If (LEqual (PM4L, One))
{
CreateBitField (BUF0, \_SB.PCI0._Y06._RW, D8RW) // _RW_: Read-Write Status
Store (Zero, D8RW) /* \_SB_.PCI0._CRS.D8RW */
}
If (PM4H)
{
CreateDWordField (BUF0, \_SB.PCI0._Y07._LEN, DCLN) // _LEN: Length
Store (Zero, DCLN) /* \_SB_.PCI0._CRS.DCLN */
}
If (LEqual (PM4H, One))
{
CreateBitField (BUF0, \_SB.PCI0._Y07._RW, DCRW) // _RW_: Read-Write Status
Store (Zero, DCRW) /* \_SB_.PCI0._CRS.DCRW */
}
If (PM5L)
{
CreateDWordField (BUF0, \_SB.PCI0._Y08._LEN, E0LN) // _LEN: Length
Store (Zero, E0LN) /* \_SB_.PCI0._CRS.E0LN */
}
If (LEqual (PM5L, One))
{
CreateBitField (BUF0, \_SB.PCI0._Y08._RW, E0RW) // _RW_: Read-Write Status
Store (Zero, E0RW) /* \_SB_.PCI0._CRS.E0RW */
}
If (PM5H)
{
CreateDWordField (BUF0, \_SB.PCI0._Y09._LEN, E4LN) // _LEN: Length
Store (Zero, E4LN) /* \_SB_.PCI0._CRS.E4LN */
}
If (LEqual (PM5H, One))
{
CreateBitField (BUF0, \_SB.PCI0._Y09._RW, E4RW) // _RW_: Read-Write Status
Store (Zero, E4RW) /* \_SB_.PCI0._CRS.E4RW */
}
If (PM6L)
{
CreateDWordField (BUF0, \_SB.PCI0._Y0A._LEN, E8LN) // _LEN: Length
Store (Zero, E8LN) /* \_SB_.PCI0._CRS.E8LN */
}
If (LEqual (PM6L, One))
{
CreateBitField (BUF0, \_SB.PCI0._Y0A._RW, E8RW) // _RW_: Read-Write Status
Store (Zero, E8RW) /* \_SB_.PCI0._CRS.E8RW */
}
If (PM6H)
{
CreateDWordField (BUF0, \_SB.PCI0._Y0B._LEN, ECLN) // _LEN: Length
Store (Zero, ECLN) /* \_SB_.PCI0._CRS.ECLN */
}
If (LEqual (PM6H, One))
{
CreateBitField (BUF0, \_SB.PCI0._Y0B._RW, ECRW) // _RW_: Read-Write Status
Store (Zero, ECRW) /* \_SB_.PCI0._CRS.ECRW */
}
If (PM0H)
{
CreateDWordField (BUF0, \_SB.PCI0._Y0C._LEN, F0LN) // _LEN: Length
Store (Zero, F0LN) /* \_SB_.PCI0._CRS.F0LN */
}
If (LEqual (PM0H, One))
{
CreateBitField (BUF0, \_SB.PCI0._Y0C._RW, F0RW) // _RW_: Read-Write Status
Store (Zero, F0RW) /* \_SB_.PCI0._CRS.F0RW */
}
CreateDWordField (BUF0, \_SB.PCI0._Y0D._MIN, M1MN) // _MIN: Minimum Base Address
CreateDWordField (BUF0, \_SB.PCI0._Y0D._MAX, M1MX) // _MAX: Maximum Base Address
CreateDWordField (BUF0, \_SB.PCI0._Y0D._LEN, M1LN) // _LEN: Length
ShiftLeft (TOUD, 0x1B, M1MN) /* \_SB_.PCI0._CRS.M1MN */
Add (Subtract (M1MX, M1MN), One, M1LN) /* \_SB_.PCI0._CRS.M1LN */
Acquire (^LPCB.TPM.TPLK, 0xFFFF)
Store (0x55, ^LPCB.TPM.TINX) /* \_SB_.PCI0.LPCB.TPM_.TINX */
Store (^LPCB.TPM.CHID, Local0)
Store (0xAA, ^LPCB.TPM.TINX) /* \_SB_.PCI0.LPCB.TPM_.TINX */
Release (^LPCB.TPM.TPLK)
If (LNotEqual (Local0, 0x0B))
{
CreateDWordField (BUF0, \_SB.PCI0._Y0E._LEN, TPLN) // _LEN: Length
Store (Zero, TPLN) /* \_SB_.PCI0._CRS.TPLN */
}
Return (BUF0) /* \_SB_.PCI0.BUF0 */
}
Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table
{
If (GPIC)
{
Return (Package (0x12)
{
Package (0x04)
{
0x0001FFFF,
Zero,
Zero,
0x10
},
Package (0x04)
{
0x0002FFFF,
Zero,
Zero,
0x10
},
Package (0x04)
{
0x0007FFFF,
Zero,
Zero,
0x10
},
Package (0x04)
{
0x001BFFFF,
Zero,
Zero,
0x16
},
Package (0x04)
{
0x001CFFFF,
Zero,
Zero,
0x11
},
Package (0x04)
{
0x001CFFFF,
One,
Zero,
0x10
},
Package (0x04)
{
0x001CFFFF,
0x02,
Zero,
0x12
},
Package (0x04)
{
0x001CFFFF,
0x03,
Zero,
0x13
},
Package (0x04)
{
0x001DFFFF,
Zero,
Zero,
0x17
},
Package (0x04)
{
0x001DFFFF,
One,
Zero,
0x13
},
Package (0x04)
{
0x001DFFFF,
0x02,
Zero,
0x12
},
Package (0x04)
{
0x001DFFFF,
0x03,
Zero,
0x10
},
Package (0x04)
{
0x001DFFFF,
0x07,
Zero,
0x17
},
Package (0x04)
{
0x001EFFFF,
Zero,
Zero,
0x16
},
Package (0x04)
{
0x001EFFFF,
One,
Zero,
0x14
},
Package (0x04)
{
0x001FFFFF,
Zero,
Zero,
0x12
},
Package (0x04)
{
0x001FFFFF,
One,
Zero,
0x13
},
Package (0x04)
{
0x001FFFFF,
0x03,
Zero,
0x10
}
})
}
Else
{
Return (Package (0x11)
{
Package (0x04)
{
0x0001FFFF,
Zero,
^LPCB.LNKA,
Zero
},
Package (0x04)
{
0x0002FFFF,
Zero,
^LPCB.LNKA,
Zero
},
Package (0x04)
{
0x0007FFFF,
Zero,
^LPCB.LNKA,
Zero
},
Package (0x04)
{
0x001BFFFF,
Zero,
^LPCB.LNKG,
Zero
},
Package (0x04)
{
0x001CFFFF,
Zero,
^LPCB.LNKB,
Zero
},
Package (0x04)
{
0x001CFFFF,
One,
^LPCB.LNKA,
Zero
},
Package (0x04)
{
0x001CFFFF,
0x02,
^LPCB.LNKC,
Zero
},
Package (0x04)
{
0x001CFFFF,
0x03,
^LPCB.LNKD,
Zero
},
Package (0x04)
{
0x001DFFFF,
Zero,
^LPCB.LNKH,
Zero
},
Package (0x04)
{
0x001DFFFF,
One,
^LPCB.LNKD,
Zero
},
Package (0x04)
{
0x001DFFFF,
0x02,
^LPCB.LNKC,
Zero
},
Package (0x04)
{
0x001DFFFF,
0x03,
^LPCB.LNKA,
Zero
},
Package (0x04)
{
0x001EFFFF,
Zero,
^LPCB.LNKG,
Zero
},
Package (0x04)
{
0x001EFFFF,
One,
^LPCB.LNKE,
Zero
},
Package (0x04)
{
0x001FFFFF,
Zero,
^LPCB.LNKC,
Zero
},
Package (0x04)
{
0x001FFFFF,
One,
^LPCB.LNKD,
Zero
},
Package (0x04)
{
0x001FFFFF,
0x03,
^LPCB.LNKA,
Zero
}
})
}
}
Device (PDRC)
{
Name (_HID, EisaId ("PNP0C02") /* PNP Motherboard Resources */) // _HID: Hardware ID
Name (_UID, One) // _UID: Unique ID
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
{
Memory32Fixed (ReadWrite,
0xE0000000, // Address Base
0x10000000, // Address Length
)
Memory32Fixed (ReadWrite,
0xFED14000, // Address Base
0x00004000, // Address Length
)
Memory32Fixed (ReadWrite,
0xFED18000, // Address Base
0x00001000, // Address Length
)
Memory32Fixed (ReadWrite,
0xFED19000, // Address Base
0x00001000, // Address Length
)
Memory32Fixed (ReadWrite,
0xFED1C000, // Address Base
0x00004000, // Address Length
)
Memory32Fixed (ReadWrite,
0xFED20000, // Address Base
0x00020000, // Address Length
)
Memory32Fixed (ReadWrite,
0xFED45000, // Address Base
0x0004B000, // Address Length
)
})
}
Device (PEGP)
{
Name (_ADR, 0x00010000) // _ADR: Address
Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table
{
If (GPIC)
{
Return (Package (0x04)
{
Package (0x04)
{
0xFFFF,
Zero,
Zero,
0x10
},
Package (0x04)
{
0xFFFF,
One,
Zero,
0x11
},
Package (0x04)
{
0xFFFF,
0x02,
Zero,
0x12
},
Package (0x04)
{
0xFFFF,
0x03,
Zero,
0x13
}
})
}
Else
{
Return (Package (0x04)
{
Package (0x04)
{
0xFFFF,
Zero,
^^LPCB.LNKA,
Zero
},
Package (0x04)
{
0xFFFF,
One,
^^LPCB.LNKB,
Zero
},
Package (0x04)
{
0xFFFF,
0x02,
^^LPCB.LNKC,
Zero
},
Package (0x04)
{
0xFFFF,
0x03,
^^LPCB.LNKD,
Zero
}
})
}
}
Device (VGA)
{
Name (_ADR, Zero) // _ADR: Address
Name (SWIT, One)
Name (CRTA, One)
Name (LCDA, One)
Name (TVAA, One)
Name (DVIA, One)
Name (VLDF, One)
OperationRegion (VIDS, PCI_Config, Zero, 0xC8)
Field (VIDS, DWordAcc, NoLock, Preserve)
{
VDID, 32
}
Method (_STA, 0, NotSerialized) // _STA: Status
{
Return (0x0F)
}
Name (_PSC, Zero) // _PSC: Power State Current
Method (_PS0, 0, NotSerialized) // _PS0: Power State 0
{
Store (Zero, _PSC) /* \_SB_.PCI0.PEGP.VGA_._PSC */
}
Method (_PS1, 0, NotSerialized) // _PS1: Power State 1
{
Store (One, _PSC) /* \_SB_.PCI0.PEGP.VGA_._PSC */
}
Method (_PS3, 0, NotSerialized) // _PS3: Power State 3
{
Store (0x03, _PSC) /* \_SB_.PCI0.PEGP.VGA_._PSC */
}
Method (_DOS, 1, NotSerialized) // _DOS: Disable Output Switching
{
Store (And (Arg0, 0x03), SWIT) /* \_SB_.PCI0.PEGP.VGA_.SWIT */
}
Method (_DOD, 0, NotSerialized) // _DOD: Display Output Devices
{
If (LEqual (VVEN, One))
{
Return (Package (0x04)
{
0x00010100,
0x00010110,
0x0200,
0x0210
})
}
Else
{
Return (Package (0x04)
{
0x00010100,
0x00010110,
0x0200,
0x0120
})
}
}
Device (CRT)
{
Method (_ADR, 0, NotSerialized) // _ADR: Address
{
Return (0x0100)
}
Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status
{
Store (CADL, Local0)
Store (CSTE, Local1)
And (Local0, 0x02, Local0)
And (Local1, 0x02, Local1)
If (Local0)
{
Store (One, CRTA) /* \_SB_.PCI0.PEGP.VGA_.CRTA */
}
Else
{
Store (Zero, CRTA) /* \_SB_.PCI0.PEGP.VGA_.CRTA */
}
If (CRTA)
{
If (LEqual (Local1, 0x02))
{
Return (0x1F)
}
Else
{
Return (0x1D)
}
}
Else
{
If (LEqual (Local1, 0x02))
{
Return (0x0F)
}
Else
{
Return (0x0D)
}
}
}
Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State
{
If (CRTA)
{
Return (One)
}
Else
{
Return (Zero)
}
}
Method (_DSS, 1, NotSerialized) // _DSS: Device Set State
{
}
}
Device (LCD)
{
Method (_ADR, 0, NotSerialized) // _ADR: Address
{
Return (0x0110)
}
Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status
{
Store (CADL, Local0)
Store (CSTE, Local1)
And (Local0, One, Local0)
And (Local1, One, Local1)
If (Local0)
{
Store (One, LCDA) /* \_SB_.PCI0.PEGP.VGA_.LCDA */
}
Else
{
Store (Zero, LCDA) /* \_SB_.PCI0.PEGP.VGA_.LCDA */
}
If (LCDA)
{
If (LEqual (Local1, One))
{
Return (0x1F)
}
Else
{
Return (0x1D)
}
}
Else
{
If (LEqual (Local1, One))
{
Return (0x0F)
}
Else
{
Return (0x0D)
}
}
}
Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State
{
If (LCDA)
{
Return (One)
}
Else
{
Return (Zero)
}
}
Method (_DSS, 1, NotSerialized) // _DSS: Device Set State
{
}
}
Device (TV)
{
Method (_ADR, 0, NotSerialized) // _ADR: Address
{
Return (0x0200)
}
Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status
{
Store (CADL, Local0)
Store (CSTE, Local1)
And (Local0, 0x04, Local0)
And (Local1, 0x04, Local1)
If (Local0)
{
Store (One, TVAA) /* \_SB_.PCI0.PEGP.VGA_.TVAA */
}
Else
{
Store (Zero, TVAA) /* \_SB_.PCI0.PEGP.VGA_.TVAA */
}
If (TVAA)
{
If (LEqual (Local1, 0x04))
{
Return (0x1F)
}
Else
{
Return (0x1D)
}
}
Else
{
If (LEqual (Local1, 0x04))
{
Return (0x0F)
}
Else
{
Return (0x0D)
}
}
}
Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State
{
If (TVAA)
{
Return (One)
}
Else
{
Return (Zero)
}
}
Method (_DSS, 1, NotSerialized) // _DSS: Device Set State
{
}
}
Device (DVI)
{
Method (_ADR, 0, NotSerialized) // _ADR: Address
{
If (LEqual (VVEN, One))
{
Return (0x0210)
}
Else
{
Return (0x0120)
}
}
Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status
{
Store (CADL, Local0)
Store (CSTE, Local1)
And (Local0, 0x08, Local0)
And (Local1, 0x08, Local1)
If (Local0)
{
Store (One, DVIA) /* \_SB_.PCI0.PEGP.VGA_.DVIA */
}
Else
{
Store (Zero, DVIA) /* \_SB_.PCI0.PEGP.VGA_.DVIA */
}
If (DVIA)
{
If (LEqual (Local1, 0x08))
{
Return (0x1F)
}
Else
{
Return (0x1D)
}
}
Else
{
If (LEqual (Local1, 0x08))
{
Return (0x0F)
}
Else
{
Return (0x0D)
}
}
}
Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State
{
If (DVIA)
{
Return (One)
}
Else
{
Return (Zero)
}
}
Method (_DSS, 1, NotSerialized) // _DSS: Device Set State
{
}
}
Method (DSSW, 0, NotSerialized)
{
If (LEqual (SWIT, Zero))
{
Store (0x90, SMIF) /* \SMIF */
Store (Zero, TRP0) /* \TRP0 */
Store (CADL, Local0)
Store (CSTE, Local1)
If (LGreater (Local1, One))
{
And (Local0, Local1, VLDF) /* \_SB_.PCI0.PEGP.VGA_.VLDF */
And (VLDF, 0xFE, VLDF) /* \_SB_.PCI0.PEGP.VGA_.VLDF */
}
If (VLDF)
{
If (LEqual (Local0, 0x09))
{
If (LEqual (Local1, 0x08))
{
STBL (0x03)
}
If (LEqual (Local1, One))
{
STBL (One)
}
If (LEqual (Local1, 0x09))
{
STBL (0x02)
}
}
If (LEqual (Local0, 0x0A))
{
If (LEqual (Local1, 0x08))
{
STBL (0x05)
}
If (LEqual (Local1, 0x02))
{
STBL (One)
}
If (LEqual (Local1, 0x0A))
{
STBL (0x04)
}
}
If (LEqual (Local0, 0x0B))
{
If (LEqual (Local1, 0x08))
{
STBL (0x03)
}
If (LEqual (Local1, 0x09))
{
STBL (0x02)
}
If (LEqual (Local1, One))
{
STBL (0x05)
}
If (LEqual (Local1, 0x0A))
{
STBL (0x04)
}
If (LEqual (Local1, 0x02))
{
STBL (One)
}
If (LEqual (Local1, 0x0B))
{
STBL (One)
}
}
If (LOr (LEqual (Local0, 0x0C), LEqual (Local0, 0x0D)))
{
If (LEqual (Local1, 0x08))
{
STBL (0x09)
}
If (LEqual (Local1, 0x0C))
{
STBL (0x08)
}
If (LEqual (Local1, 0x04))
{
STBL (One)
}
}
If (LOr (LEqual (Local0, 0x0E), LEqual (Local0, 0x0F)))
{
If (LEqual (Local1, 0x08))
{
STBL (0x09)
}
If (LEqual (Local1, 0x0C))
{
STBL (0x08)
}
If (LEqual (Local1, 0x04))
{
STBL (0x05)
}
If (LEqual (Local1, 0x0A))
{
STBL (0x04)
}
If (LEqual (Local1, 0x02))
{
STBL (One)
}
}
}
Else
{
Store (One, VLDF) /* \_SB_.PCI0.PEGP.VGA_.VLDF */
STBL (One)
}
}
Else
{
If (LEqual (SWIT, One))
{
Store (0x92, SMIF) /* \SMIF */
Store (Zero, TRP0) /* \TRP0 */
}
}
}
Method (STBL, 1, NotSerialized)
{
If (LEqual (Arg0, One))
{
Store (Zero, CRTA) /* \_SB_.PCI0.PEGP.VGA_.CRTA */
Store (One, LCDA) /* \_SB_.PCI0.PEGP.VGA_.LCDA */
Store (Zero, TVAA) /* \_SB_.PCI0.PEGP.VGA_.TVAA */
Store (Zero, DVIA) /* \_SB_.PCI0.PEGP.VGA_.DVIA */
}
If (LEqual (Arg0, 0x02))
{
Store (One, CRTA) /* \_SB_.PCI0.PEGP.VGA_.CRTA */
Store (Zero, LCDA) /* \_SB_.PCI0.PEGP.VGA_.LCDA */
Store (Zero, TVAA) /* \_SB_.PCI0.PEGP.VGA_.TVAA */
Store (Zero, DVIA) /* \_SB_.PCI0.PEGP.VGA_.DVIA */
}
If (LEqual (Arg0, 0x03))
{
Store (One, CRTA) /* \_SB_.PCI0.PEGP.VGA_.CRTA */
Store (One, LCDA) /* \_SB_.PCI0.PEGP.VGA_.LCDA */
Store (Zero, TVAA) /* \_SB_.PCI0.PEGP.VGA_.TVAA */
Store (Zero, DVIA) /* \_SB_.PCI0.PEGP.VGA_.DVIA */
}
If (LEqual (Arg0, 0x04))
{
Store (Zero, CRTA) /* \_SB_.PCI0.PEGP.VGA_.CRTA */
Store (Zero, LCDA) /* \_SB_.PCI0.PEGP.VGA_.LCDA */
Store (One, TVAA) /* \_SB_.PCI0.PEGP.VGA_.TVAA */
Store (Zero, DVIA) /* \_SB_.PCI0.PEGP.VGA_.DVIA */
}
If (LEqual (Arg0, 0x05))
{
Store (Zero, CRTA) /* \_SB_.PCI0.PEGP.VGA_.CRTA */
Store (One, LCDA) /* \_SB_.PCI0.PEGP.VGA_.LCDA */
Store (One, TVAA) /* \_SB_.PCI0.PEGP.VGA_.TVAA */
Store (Zero, DVIA) /* \_SB_.PCI0.PEGP.VGA_.DVIA */
}
If (LEqual (Arg0, 0x06))
{
Store (One, CRTA) /* \_SB_.PCI0.PEGP.VGA_.CRTA */
Store (Zero, LCDA) /* \_SB_.PCI0.PEGP.VGA_.LCDA */
Store (One, TVAA) /* \_SB_.PCI0.PEGP.VGA_.TVAA */
Store (Zero, DVIA) /* \_SB_.PCI0.PEGP.VGA_.DVIA */
}
If (LEqual (Arg0, 0x07))
{
Store (One, CRTA) /* \_SB_.PCI0.PEGP.VGA_.CRTA */
Store (One, LCDA) /* \_SB_.PCI0.PEGP.VGA_.LCDA */
Store (One, TVAA) /* \_SB_.PCI0.PEGP.VGA_.TVAA */
Store (Zero, DVIA) /* \_SB_.PCI0.PEGP.VGA_.DVIA */
}
If (LEqual (Arg0, 0x08))
{
Store (Zero, CRTA) /* \_SB_.PCI0.PEGP.VGA_.CRTA */
Store (Zero, LCDA) /* \_SB_.PCI0.PEGP.VGA_.LCDA */
Store (Zero, TVAA) /* \_SB_.PCI0.PEGP.VGA_.TVAA */
Store (One, DVIA) /* \_SB_.PCI0.PEGP.VGA_.DVIA */
}
If (LEqual (Arg0, 0x09))
{
Store (Zero, CRTA) /* \_SB_.PCI0.PEGP.VGA_.CRTA */
Store (One, LCDA) /* \_SB_.PCI0.PEGP.VGA_.LCDA */
Store (Zero, TVAA) /* \_SB_.PCI0.PEGP.VGA_.TVAA */
Store (One, DVIA) /* \_SB_.PCI0.PEGP.VGA_.DVIA */
}
Notify (VGA, 0x80) // Status Change
}
Method (TVSW, 0, NotSerialized)
{
}
}
}
Device (GFX0)
{
Name (_ADR, 0x00020000) // _ADR: Address
Method (_DOS, 1, NotSerialized) // _DOS: Disable Output Switching
{
Store (And (Arg0, 0x03), DSEN) /* \DSEN */
}
Method (_DOD, 0, NotSerialized) // _DOD: Display Output Devices
{
Return (Package (0x03)
{
0x00010100,
0x00010400,
0x00010200
})
}
Device (CRT1)
{
Name (_ADR, 0x0100) // _ADR: Address
Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status
{
If (And (CSTE, 0x0101))
{
Return (0x1F)
}
Return (0x1D)
}
Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State
{
If (And (NSTE, 0x0101))
{
Return (One)
}
Return (Zero)
}
Method (_DSS, 1, NotSerialized) // _DSS: Device Set State
{
If (LEqual (And (Arg0, 0xC0000000), 0xC0000000))
{
Store (NSTE, CSTE) /* \CSTE */
}
}
}
Device (DTV1)
{
Name (_ADR, 0x0200) // _ADR: Address
Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status
{
If (And (CSTE, 0x0202))
{
Return (0x1F)
}
Return (0x1D)
}
Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State
{
If (And (NSTE, 0x0202))
{
Return (One)
}
Return (Zero)
}
Method (_DSS, 1, NotSerialized) // _DSS: Device Set State
{
If (LEqual (And (Arg0, 0xC0000000), 0xC0000000))
{
Store (NSTE, CSTE) /* \CSTE */
}
}
}
Device (LCD)
{
Method (_ADR, 0, NotSerialized) // _ADR: Address
{
Return (0x0400)
}
Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status
{
If (And (CSTE, 0x0808))
{
Return (0x1F)
}
Return (0x1D)
}
Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State
{
If (And (NSTE, 0x0808))
{
Return (One)
}
Return (Zero)
}
Method (_DSS, 1, NotSerialized) // _DSS: Device Set State
{
If (LEqual (And (Arg0, 0xC0000000), 0xC0000000))
{
Store (NSTE, CSTE) /* \CSTE */
}
}
Method (_BCL, 0, NotSerialized) // _BCL: Brightness Control Levels
{
Return (Package (0x08)
{
0x50,
0x3C,
Zero,
0x14,
0x28,
0x3C,
0x50,
0x64
})
}
Method (_BCM, 1, NotSerialized) // _BCM: Brightness Control Method
{
Store (Arg0, PO80) /* \PO80 */
}
}
Method (DSSW, 0, NotSerialized)
{
Store (0x90, SMIF) /* \SMIF */
Store (Zero, TRP0) /* \TRP0 */
DSSM ()
}
Method (DSSM, 0, NotSerialized)
{
If (LEqual (Zero, DSEN))
{
Store (CADL, PADL) /* \PADL */
If (LGreaterEqual (OSYS, 0x07D1))
{
Notify (PCI0, Zero) // Bus Check
}
Else
{
Notify (GFX0, Zero) // Bus Check
}
Sleep (0x03E8)
Notify (GFX0, 0x80) // Status Change
}
If (LEqual (One, DSEN))
{
Store (0x92, SMIF) /* \SMIF */
Store (Zero, TRP0) /* \TRP0 */
Notify (GFX0, 0x81) // Information Change
}
}
Method (STBL, 1, NotSerialized)
{
If (LEqual (And (Arg0, 0x07), Zero))
{
Store (0x0800, NSTE) /* \NSTE */
}
Else
{
If (LEqual (Arg0, One))
{
Store (0x0800, NSTE) /* \NSTE */
}
If (LEqual (Arg0, 0x02))
{
Store (One, NSTE) /* \NSTE */
}
If (LEqual (Arg0, 0x03))
{
Store (0x0801, NSTE) /* \NSTE */
}
If (LEqual (Arg0, 0x04))
{
Store (0x02, NSTE) /* \NSTE */
}
If (LEqual (Arg0, 0x05))
{
Store (0x0802, NSTE) /* \NSTE */
}
If (LEqual (Arg0, 0x06))
{
Store (0x03, NSTE) /* \NSTE */
}
If (LEqual (Arg0, 0x07))
{
Store (0x0803, NSTE) /* \NSTE */
}
}
DSSM ()
}
Method (TVSW, 0, NotSerialized)
{
If (LEqual (DSEN, Zero))
{
Store (0x90, SMIF) /* \SMIF */
Store (Zero, TRP0) /* \TRP0 */
If (And (CADL, 0x0202))
{
STBL (0x04)
}
Else
{
STBL (One)
}
}
Else
{
If (LEqual (DSEN, One))
{
Store (0x92, SMIF) /* \SMIF */
Store (Zero, TRP0) /* \TRP0 */
}
}
}
}
Device (HDEF)
{
Name (_ADR, 0x001B0000) // _ADR: Address
Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake
{
0x05,
0x04
})
}
Device (RP01)
{
Name (_ADR, 0x001C0000) // _ADR: Address
OperationRegion (P1CS, PCI_Config, 0x40, 0x0100)
Field (P1CS, AnyAcc, NoLock, WriteAsZeros)
{
Offset (0x1A),
ABP1, 1,
, 2,
PDC1, 1,
, 2,
PDS1, 1,
Offset (0x20),
Offset (0x22),
PSP1, 1,
Offset (0x9C),
, 30,
HPCS, 1,
PMCS, 1
}
Device (PXS1)
{
Name (_ADR, Zero) // _ADR: Address
Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake
{
0x09,
0x04
})
}
Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table
{
If (GPIC)
{
Return (Package (0x04)
{
Package (0x04)
{
0xFFFF,
Zero,
Zero,
0x10
},
Package (0x04)
{
0xFFFF,
One,
Zero,
0x11
},
Package (0x04)
{
0xFFFF,
0x02,
Zero,
0x12
},
Package (0x04)
{
0xFFFF,
0x03,
Zero,
0x13
}
})
}
Else
{
Return (Package (0x04)
{
Package (0x04)
{
0xFFFF,
Zero,
^^LPCB.LNKA,
Zero
},
Package (0x04)
{
0xFFFF,
One,
^^LPCB.LNKB,
Zero
},
Package (0x04)
{
0xFFFF,
0x02,
^^LPCB.LNKC,
Zero
},
Package (0x04)
{
0xFFFF,
0x03,
^^LPCB.LNKD,
Zero
}
})
}
}
}
Device (RP02)
{
Name (_ADR, 0x001C0001) // _ADR: Address
OperationRegion (P2CS, PCI_Config, 0x40, 0x0100)
Field (P2CS, AnyAcc, NoLock, WriteAsZeros)
{
Offset (0x1A),
ABP2, 1,
, 2,
PDC2, 1,
, 2,
PDS2, 1,
Offset (0x20),
Offset (0x22),
PSP2, 1,
Offset (0x9C),
, 30,
HPCS, 1,
PMCS, 1
}
Device (PXS2)
{
Name (_ADR, Zero) // _ADR: Address
Method (_RMV, 0, NotSerialized) // _RMV: Removal Status
{
Return (One)
}
Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake
{
0x09,
0x04
})
Name (_EJD, "\\_SB.PCI0.USB7.HUB7.PRT7") // _EJD: Ejection Dependent Device
}
Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table
{
If (GPIC)
{
Return (Package (0x04)
{
Package (0x04)
{
0xFFFF,
Zero,
Zero,
0x11
},
Package (0x04)
{
0xFFFF,
One,
Zero,
0x12
},
Package (0x04)
{
0xFFFF,
0x02,
Zero,
0x13
},
Package (0x04)
{
0xFFFF,
0x03,
Zero,
0x10
}
})
}
Else
{
Return (Package (0x04)
{
Package (0x04)
{
0xFFFF,
Zero,
^^LPCB.LNKB,
Zero
},
Package (0x04)
{
0xFFFF,
One,
^^LPCB.LNKC,
Zero
},
Package (0x04)
{
0xFFFF,
0x02,
^^LPCB.LNKD,
Zero
},
Package (0x04)
{
0xFFFF,
0x03,
^^LPCB.LNKA,
Zero
}
})
}
}
}
Device (RP03)
{
Name (_ADR, 0x001C0002) // _ADR: Address
OperationRegion (P3CS, PCI_Config, 0x40, 0x0100)
Field (P3CS, AnyAcc, NoLock, WriteAsZeros)
{
Offset (0x1A),
ABP3, 1,
, 2,
PDC3, 1,
, 2,
PDS3, 1,
Offset (0x20),
Offset (0x22),
PSP3, 1,
Offset (0x9C),
, 30,
HPCS, 1,
PMCS, 1
}
Device (PXS3)
{
Name (_ADR, Zero) // _ADR: Address
Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake
{
0x09,
0x04
})
}
Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table
{
If (GPIC)
{
Return (Package (0x04)
{
Package (0x04)
{
0xFFFF,
Zero,
Zero,
0x12
},
Package (0x04)
{
0xFFFF,
One,
Zero,
0x13
},
Package (0x04)
{
0xFFFF,
0x02,
Zero,
0x10
},
Package (0x04)
{
0xFFFF,
0x03,
Zero,
0x11
}
})
}
Else
{
Return (Package (0x04)
{
Package (0x04)
{
0xFFFF,
Zero,
^^LPCB.LNKC,
Zero
},
Package (0x04)
{
0xFFFF,
One,
^^LPCB.LNKD,
Zero
},
Package (0x04)
{
0xFFFF,
0x02,
^^LPCB.LNKA,
Zero
},
Package (0x04)
{
0xFFFF,
0x03,
^^LPCB.LNKB,
Zero
}
})
}
}
}
Device (USB1)
{
Name (_ADR, 0x001D0000) // _ADR: Address
Device (HUB1)
{
Name (_ADR, Zero) // _ADR: Address
Device (PRT1)
{
Name (_ADR, One) // _ADR: Address
}
Device (PRT2)
{
Name (_ADR, 0x02) // _ADR: Address
}
}
OperationRegion (U1CS, PCI_Config, 0xC4, 0x04)
Field (U1CS, DWordAcc, NoLock, Preserve)
{
U1EN, 2
}
Method (_PSW, 1, NotSerialized) // _PSW: Power State Wake
{
If (Arg0)
{
Store (0x03, U1EN) /* \_SB_.PCI0.USB1.U1EN */
}
Else
{
Store (Zero, U1EN) /* \_SB_.PCI0.USB1.U1EN */
}
}
}
Device (USB2)
{
Name (_ADR, 0x001D0001) // _ADR: Address
Device (HUB2)
{
Name (_ADR, Zero) // _ADR: Address
Device (PRT1)
{
Name (_ADR, One) // _ADR: Address
}
Device (PRT2)
{
Name (_ADR, 0x02) // _ADR: Address
}
}
OperationRegion (U2CS, PCI_Config, 0xC4, 0x04)
Field (U2CS, DWordAcc, NoLock, Preserve)
{
U2EN, 2
}
Method (_PSW, 1, NotSerialized) // _PSW: Power State Wake
{
If (Arg0)
{
Store (0x03, U2EN) /* \_SB_.PCI0.USB2.U2EN */
}
Else
{
Store (Zero, U2EN) /* \_SB_.PCI0.USB2.U2EN */
}
}
}
Device (USB3)
{
Name (_ADR, 0x001D0002) // _ADR: Address
Device (HUB3)
{
Name (_ADR, Zero) // _ADR: Address
Device (PRT1)
{
Name (_ADR, One) // _ADR: Address
}
Device (PRT2)
{
Name (_ADR, 0x02) // _ADR: Address
}
}
OperationRegion (U2CS, PCI_Config, 0xC4, 0x04)
Field (U2CS, DWordAcc, NoLock, Preserve)
{
U3EN, 2
}
Method (_PSW, 1, NotSerialized) // _PSW: Power State Wake
{
If (Arg0)
{
Store (0x03, U3EN) /* \_SB_.PCI0.USB3.U3EN */
}
Else
{
Store (Zero, U3EN) /* \_SB_.PCI0.USB3.U3EN */
}
}
}
Device (USB4)
{
Name (_ADR, 0x001D0003) // _ADR: Address
Device (HUB4)
{
Name (_ADR, Zero) // _ADR: Address
Device (PRT1)
{
Name (_ADR, One) // _ADR: Address
Name (_EJD, "\\_SB.PCI0.RP02.PXS2") // _EJD: Ejection Dependent Device
}
Device (PRT2)
{
Name (_ADR, 0x02) // _ADR: Address
}
}
OperationRegion (U4CS, PCI_Config, 0xC4, 0x04)
Field (U4CS, DWordAcc, NoLock, Preserve)
{
U4EN, 2
}
Method (_PSW, 1, NotSerialized) // _PSW: Power State Wake
{
If (Arg0)
{
Store (0x03, U4EN) /* \_SB_.PCI0.USB4.U4EN */
}
Else
{
Store (Zero, U4EN) /* \_SB_.PCI0.USB4.U4EN */
}
}
}
Device (USB7)
{
Name (_ADR, 0x001D0007) // _ADR: Address
Device (HUB7)
{
Name (_ADR, Zero) // _ADR: Address
Device (PRT1)
{
Name (_ADR, One) // _ADR: Address
}
Device (PRT2)
{
Name (_ADR, 0x02) // _ADR: Address
}
Device (PRT3)
{
Name (_ADR, 0x03) // _ADR: Address
}
Device (PRT4)
{
Name (_ADR, 0x04) // _ADR: Address
}
Device (PRT5)
{
Name (_ADR, 0x05) // _ADR: Address
}
Device (PRT6)
{
Name (_ADR, 0x06) // _ADR: Address
}
Device (PRT7)
{
Name (_ADR, 0x07) // _ADR: Address
Name (_EJD, "\\_SB.PCI0.RP02.PXS2") // _EJD: Ejection Dependent Device
}
Device (PRT8)
{
Name (_ADR, 0x08) // _ADR: Address
}
}
}
Device (PCIB)
{
Name (_ADR, 0x001E0000) // _ADR: Address
Device (DOCK)
{
Name (_HID, EisaId ("PNP0A05") /* Generic Container Device */) // _HID: Hardware ID
Name (_UID, One) // _UID: Unique ID
Method (_DCK, 1, NotSerialized) // _DCK: Dock Present
{
If (Arg0)
{
Return (One)
}
Else
{
Return (One)
}
}
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (DKAP)
{
Return (Zero)
}
Store (RDEC (0x92), Local1)
Store (And (Local1, 0x02), Local2)
If (Local2)
{
Store (^^^LPCB.EC0.DKIF, Local0)
If (Local0)
{
Return (0x0F)
}
Else
{
Return (Zero)
}
}
Else
{
Return (Zero)
}
}
Method (_BDN, 0, NotSerialized) // _BDN: BIOS Dock Name
{
If (CKDK ())
{
Return (0x2151F351)
}
Else
{
Return (Zero)
}
}
Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device
{
If (Arg0)
{
Reset (DKRQ)
Wait (DKRQ, 0x1400)
Store (0x02, ^^^LPCB.EC0.DPPR) /* \_SB_.PCI0.LPCB.EC0_.DPPR */
Sleep (0x14)
}
}
}
Event (DKRQ)
Device (LANC)
{
Name (_ADR, 0x00080000) // _ADR: Address
Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake
{
0x0B,
0x04
})
}
Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table
{
If (GPIC)
{
Return (Package (0x04)
{
Package (0x04)
{
0x0006FFFF,
Zero,
Zero,
0x12
},
Package (0x04)
{
0x0006FFFF,
One,
Zero,
0x11
},
Package (0x04)
{
0x0006FFFF,
0x02,
Zero,
0x10
},
Package (0x04)
{
0x0008FFFF,
Zero,
Zero,
0x14
}
})
}
Else
{
Return (Package (0x04)
{
Package (0x04)
{
0x0006FFFF,
Zero,
^^LPCB.LNKC,
Zero
},
Package (0x04)
{
0x0006FFFF,
One,
^^LPCB.LNKB,
Zero
},
Package (0x04)
{
0x0006FFFF,
0x02,
^^LPCB.LNKA,
Zero
},
Package (0x04)
{
0x0008FFFF,
Zero,
^^LPCB.LNKE,
Zero
}
})
}
}
}
Device (LPCB)
{
Name (_ADR, 0x001F0000) // _ADR: Address
OperationRegion (LPC0, PCI_Config, 0x40, 0xC0)
Field (LPC0, AnyAcc, NoLock, Preserve)
{
Offset (0x20),
PARC, 8,
PBRC, 8,
PCRC, 8,
PDRC, 8,
Offset (0x28),
PERC, 8,
PFRC, 8,
PGRC, 8,
PHRC, 8,
Offset (0x40),
IOD0, 8,
IOD1, 8,
Offset (0x4C),
GD3L, 8,
GD3H, 8,
GD3M, 8
}
Device (LNKA)
{
Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID
Name (_UID, One) // _UID: Unique ID
Method (_DIS, 0, Serialized) // _DIS: Disable Device
{
Store (0x80, PARC) /* \_SB_.PCI0.LPCB.PARC */
}
Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings
{
IRQ (Level, ActiveLow, Shared, )
{1,3,4,5,6,7,10,12,14,15}
})
Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
{
Name (RTLA, ResourceTemplate ()
{
IRQ (Level, ActiveLow, Shared, )
{}
})
CreateWordField (RTLA, One, IRQ0)
Store (Zero, IRQ0) /* \_SB_.PCI0.LPCB.LNKA._CRS.IRQ0 */
ShiftLeft (One, And (PARC, 0x0F), IRQ0) /* \_SB_.PCI0.LPCB.LNKA._CRS.IRQ0 */
Return (RTLA) /* \_SB_.PCI0.LPCB.LNKA._CRS.RTLA */
}
Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings
{
CreateWordField (Arg0, One, IRQ0)
FindSetRightBit (IRQ0, Local0)
Decrement (Local0)
Store (Local0, PARC) /* \_SB_.PCI0.LPCB.PARC */
}
Method (_STA, 0, Serialized) // _STA: Status
{
If (And (PARC, 0x80))
{
Return (0x09)
}
Else
{
Return (0x0B)
}
}
}
Device (LNKB)
{
Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID
Name (_UID, 0x02) // _UID: Unique ID
Method (_DIS, 0, Serialized) // _DIS: Disable Device
{
Store (0x80, PBRC) /* \_SB_.PCI0.LPCB.PBRC */
}
Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings
{
IRQ (Level, ActiveLow, Shared, )
{1,3,4,5,6,7,11,12,14,15}
})
Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
{
Name (RTLB, ResourceTemplate ()
{
IRQ (Level, ActiveLow, Shared, )
{}
})
CreateWordField (RTLB, One, IRQ0)
Store (Zero, IRQ0) /* \_SB_.PCI0.LPCB.LNKB._CRS.IRQ0 */
ShiftLeft (One, And (PBRC, 0x0F), IRQ0) /* \_SB_.PCI0.LPCB.LNKB._CRS.IRQ0 */
Return (RTLB) /* \_SB_.PCI0.LPCB.LNKB._CRS.RTLB */
}
Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings
{
CreateWordField (Arg0, One, IRQ0)
FindSetRightBit (IRQ0, Local0)
Decrement (Local0)
Store (Local0, PBRC) /* \_SB_.PCI0.LPCB.PBRC */
}
Method (_STA, 0, Serialized) // _STA: Status
{
If (And (PBRC, 0x80))
{
Return (0x09)
}
Else
{
Return (0x0B)
}
}
}
Device (LNKC)
{
Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID
Name (_UID, 0x03) // _UID: Unique ID
Method (_DIS, 0, Serialized) // _DIS: Disable Device
{
Store (0x80, PCRC) /* \_SB_.PCI0.LPCB.PCRC */
}
Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings
{
IRQ (Level, ActiveLow, Shared, )
{1,3,4,5,6,7,10,12,14,15}
})
Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
{
Name (RTLC, ResourceTemplate ()
{
IRQ (Level, ActiveLow, Shared, )
{}
})
CreateWordField (RTLC, One, IRQ0)
Store (Zero, IRQ0) /* \_SB_.PCI0.LPCB.LNKC._CRS.IRQ0 */
ShiftLeft (One, And (PCRC, 0x0F), IRQ0) /* \_SB_.PCI0.LPCB.LNKC._CRS.IRQ0 */
Return (RTLC) /* \_SB_.PCI0.LPCB.LNKC._CRS.RTLC */
}
Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings
{
CreateWordField (Arg0, One, IRQ0)
FindSetRightBit (IRQ0, Local0)
Decrement (Local0)
Store (Local0, PCRC) /* \_SB_.PCI0.LPCB.PCRC */
}
Method (_STA, 0, Serialized) // _STA: Status
{
If (And (PCRC, 0x80))
{
Return (0x09)
}
Else
{
Return (0x0B)
}
}
}
Device (LNKD)
{
Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID
Name (_UID, 0x04) // _UID: Unique ID
Method (_DIS, 0, Serialized) // _DIS: Disable Device
{
Store (0x80, PDRC) /* \_SB_.PCI0.LPCB.PDRC */
}
Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings
{
IRQ (Level, ActiveLow, Shared, )
{1,3,4,5,6,7,11,12,14,15}
})
Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
{
Name (RTLD, ResourceTemplate ()
{
IRQ (Level, ActiveLow, Shared, )
{}
})
CreateWordField (RTLD, One, IRQ0)
Store (Zero, IRQ0) /* \_SB_.PCI0.LPCB.LNKD._CRS.IRQ0 */
ShiftLeft (One, And (PDRC, 0x0F), IRQ0) /* \_SB_.PCI0.LPCB.LNKD._CRS.IRQ0 */
Return (RTLD) /* \_SB_.PCI0.LPCB.LNKD._CRS.RTLD */
}
Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings
{
CreateWordField (Arg0, One, IRQ0)
FindSetRightBit (IRQ0, Local0)
Decrement (Local0)
Store (Local0, PDRC) /* \_SB_.PCI0.LPCB.PDRC */
}
Method (_STA, 0, Serialized) // _STA: Status
{
If (And (PDRC, 0x80))
{
Return (0x09)
}
Else
{
Return (0x0B)
}
}
}
Device (LNKE)
{
Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID
Name (_UID, 0x05) // _UID: Unique ID
Method (_DIS, 0, Serialized) // _DIS: Disable Device
{
Store (0x80, PERC) /* \_SB_.PCI0.LPCB.PERC */
}
Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings
{
IRQ (Level, ActiveLow, Shared, )
{1,3,4,5,6,7,10,12,14,15}
})
Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
{
Name (RTLE, ResourceTemplate ()
{
IRQ (Level, ActiveLow, Shared, )
{}
})
CreateWordField (RTLE, One, IRQ0)
Store (Zero, IRQ0) /* \_SB_.PCI0.LPCB.LNKE._CRS.IRQ0 */
ShiftLeft (One, And (PERC, 0x0F), IRQ0) /* \_SB_.PCI0.LPCB.LNKE._CRS.IRQ0 */
Return (RTLE) /* \_SB_.PCI0.LPCB.LNKE._CRS.RTLE */
}
Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings
{
CreateWordField (Arg0, One, IRQ0)
FindSetRightBit (IRQ0, Local0)
Decrement (Local0)
Store (Local0, PERC) /* \_SB_.PCI0.LPCB.PERC */
}
Method (_STA, 0, Serialized) // _STA: Status
{
If (And (PERC, 0x80))
{
Return (0x09)
}
Else
{
Return (0x0B)
}
}
}
Device (LNKF)
{
Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID
Name (_UID, 0x06) // _UID: Unique ID
Method (_DIS, 0, Serialized) // _DIS: Disable Device
{
Store (0x80, PFRC) /* \_SB_.PCI0.LPCB.PFRC */
}
Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings
{
IRQ (Level, ActiveLow, Shared, )
{1,3,4,5,6,7,11,12,14,15}
})
Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
{
Name (RTLF, ResourceTemplate ()
{
IRQ (Level, ActiveLow, Shared, )
{}
})
CreateWordField (RTLF, One, IRQ0)
Store (Zero, IRQ0) /* \_SB_.PCI0.LPCB.LNKF._CRS.IRQ0 */
ShiftLeft (One, And (PFRC, 0x0F), IRQ0) /* \_SB_.PCI0.LPCB.LNKF._CRS.IRQ0 */
Return (RTLF) /* \_SB_.PCI0.LPCB.LNKF._CRS.RTLF */
}
Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings
{
CreateWordField (Arg0, One, IRQ0)
FindSetRightBit (IRQ0, Local0)
Decrement (Local0)
Store (Local0, PFRC) /* \_SB_.PCI0.LPCB.PFRC */
}
Method (_STA, 0, Serialized) // _STA: Status
{
If (And (PFRC, 0x80))
{
Return (0x09)
}
Else
{
Return (0x0B)
}
}
}
Device (LNKG)
{
Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID
Name (_UID, 0x07) // _UID: Unique ID
Method (_DIS, 0, Serialized) // _DIS: Disable Device
{
Store (0x80, PGRC) /* \_SB_.PCI0.LPCB.PGRC */
}
Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings
{
IRQ (Level, ActiveLow, Shared, )
{1,3,4,5,6,7,10,12,14,15}
})
Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
{
Name (RTLG, ResourceTemplate ()
{
IRQ (Level, ActiveLow, Shared, )
{}
})
CreateWordField (RTLG, One, IRQ0)
Store (Zero, IRQ0) /* \_SB_.PCI0.LPCB.LNKG._CRS.IRQ0 */
ShiftLeft (One, And (PGRC, 0x0F), IRQ0) /* \_SB_.PCI0.LPCB.LNKG._CRS.IRQ0 */
Return (RTLG) /* \_SB_.PCI0.LPCB.LNKG._CRS.RTLG */
}
Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings
{
CreateWordField (Arg0, One, IRQ0)
FindSetRightBit (IRQ0, Local0)
Decrement (Local0)
Store (Local0, PGRC) /* \_SB_.PCI0.LPCB.PGRC */
}
Method (_STA, 0, Serialized) // _STA: Status
{
If (And (PGRC, 0x80))
{
Return (0x09)
}
Else
{
Return (0x0B)
}
}
}
Device (LNKH)
{
Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID
Name (_UID, 0x08) // _UID: Unique ID
Method (_DIS, 0, Serialized) // _DIS: Disable Device
{
Store (0x80, PHRC) /* \_SB_.PCI0.LPCB.PHRC */
}
Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings
{
IRQ (Level, ActiveLow, Shared, )
{1,3,4,5,6,7,11,12,14,15}
})
Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
{
Name (RTLH, ResourceTemplate ()
{
IRQ (Level, ActiveLow, Shared, )
{}
})
CreateWordField (RTLH, One, IRQ0)
Store (Zero, IRQ0) /* \_SB_.PCI0.LPCB.LNKH._CRS.IRQ0 */
ShiftLeft (One, And (PHRC, 0x0F), IRQ0) /* \_SB_.PCI0.LPCB.LNKH._CRS.IRQ0 */
Return (RTLH) /* \_SB_.PCI0.LPCB.LNKH._CRS.RTLH */
}
Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings
{
CreateWordField (Arg0, One, IRQ0)
FindSetRightBit (IRQ0, Local0)
Decrement (Local0)
Store (Local0, PHRC) /* \_SB_.PCI0.LPCB.PHRC */
}
Method (_STA, 0, Serialized) // _STA: Status
{
If (And (PHRC, 0x80))
{
Return (0x09)
}
Else
{
Return (0x0B)
}
}
}
Device (EC0)
{
Name (_HID, EisaId ("PNP0C09") /* Embedded Controller Device */) // _HID: Hardware ID
Name (_GPE, 0x16) // _GPE: General Purpose Events
Name (ECOK, Zero)
Method (_REG, 2, NotSerialized) // _REG: Region Availability
{
If (LEqual (Arg0, 0x03))
{
Store (Arg1, ECOK) /* \_SB_.PCI0.LPCB.EC0_.ECOK */
Notify (ADP0, Zero) // Bus Check
Notify (BAT0, 0x80) // Status Change
}
}
OperationRegion (ERAM, EmbeddedControl, Zero, 0xFF)
Field (ERAM, ByteAcc, NoLock, Preserve)
{
Offset (0x90),
LSCI, 8,
LHKY, 8,
LIDS, 1,
DOCK, 1,
FNST, 1,
ACST, 1,
BL1, 1,
BL2, 1,
, 1,
DKIF, 1,
SMIE, 1,
WLST, 1,
BTRT, 1,
WLIF, 1,
KSST, 1,
BTST, 1,
BION, 1,
BTON, 1,
B1EX, 1,
, 3,
B1CG, 1,
Offset (0x95),
B1DC, 1,
, 3,
B1CF, 1,
Offset (0x96),
L1B1, 1,
L1B2, 1,
Offset (0x97),
Offset (0x99),
BL1P, 7,
Offset (0x9A),
BL2P, 7,
Offset (0x9B),
BDED, 8,
CCTV, 8,
CCLT, 8,
CCHT, 8,
CCST, 8,
CFAS, 8,
Offset (0xA2),
WKSV, 8,
BNDT, 8,
B1PT, 8,
Offset (0xA7),
BLEC, 1,
Offset (0xA8),
B1RL, 8,
B1RH, 8,
B1FL, 8,
B1FH, 8,
B1DL, 8,
B1DH, 8,
Offset (0xB4),
OTCD, 8,
Offset (0xB6),
WKLD, 1,
WKKY, 1,
WKLN, 1,
Offset (0xB7),
EBPS, 1,
DKIN, 1,
UDKN, 1,
Offset (0xB8),
CKCH, 1,
SWI4, 1,
SDPF, 1,
Offset (0xB9),
B1SL, 8,
B1SH, 8,
Offset (0xBD),
B1PL, 8,
B1PH, 8,
Offset (0xC1),
THON, 8,
THOF, 8,
VFON, 8,
VFOF, 8,
BPRL, 8,
BPRH, 8,
Offset (0xCB),
VGAL, 8,
Offset (0xCD),
Offset (0xCE),
Offset (0xCF),
VGAR, 8,
VGAT, 8,
VGAS, 8,
Offset (0xD4),
DPPR, 8,
HDDI, 8,
HDPS, 8,
Offset (0xDF),
BCEL, 8
}
Mutex (MUT1, 0x00)
Method (_PS0, 0, NotSerialized) // _PS0: Power State 0
{
Store (Zero, DFEC) /* \DFEC */
}
Method (_PS3, 0, NotSerialized) // _PS3: Power State 3
{
Store (One, DFEC) /* \DFEC */
}
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
{
IO (Decode16,
0x0062, // Range Minimum
0x0062, // Range Maximum
0x01, // Alignment
0x01, // Length
)
IO (Decode16,
0x0066, // Range Minimum
0x0066, // Range Maximum
0x01, // Alignment
0x01, // Length
)
})
Method (_Q11, 0, NotSerialized) // _Qxx: EC Query
{
}
Method (_Q13, 0, NotSerialized) // _Qxx: EC Query
{
Sleep (0x32)
Notify (ADP0, Zero) // Bus Check
Notify (BAT0, 0x80) // Status Change
PNOT ()
}
Method (_Q14, 0, NotSerialized) // _Qxx: EC Query
{
Store (0x14, PRM0) /* \PRM0 */
Store (0x89, SMIF) /* \SMIF */
Store (Zero, TRP0) /* \TRP0 */
Store (LIDS, Local0)
If (LEqual (Local0, One))
{
Store (Zero, LIDF) /* \_SB_.LIDF */
}
Else
{
Store (One, LIDF) /* \_SB_.LIDF */
}
Notify (LID, 0x80) // Status Change
}
Method (_Q15, 0, NotSerialized) // _Qxx: EC Query
{
If (LAnd (LGreaterEqual (OSYS, 0x07D1), LNot (DKAP)))
{
Store (0x02, DPPR) /* \_SB_.PCI0.LPCB.EC0_.DPPR */
Sleep (0x14)
Notify (^^^PCIB.DOCK, One) // Device Check
}
Else
{
Store (0x02, DPPR) /* \_SB_.PCI0.LPCB.EC0_.DPPR */
Sleep (0x14)
Store (Zero, UNDK) /* \_SB_.UNDK */
Notify (VALG, 0x83) // Device-Specific Change
}
}
Method (_Q16, 0, NotSerialized) // _Qxx: EC Query
{
If (LAnd (LGreaterEqual (OSYS, 0x07D1), LNot (DKAP)))
{
Notify (^^^PCIB.DOCK, Zero) // Bus Check
}
Else
{
XDRV ()
}
}
Method (_Q27, 0, NotSerialized) // _Qxx: EC Query
{
If (LAnd (LGreaterEqual (OSYS, 0x07D1), LNot (DKAP)))
{
Notify (^^^PCIB.DOCK, One) // Device Check
}
Else
{
XEJB ()
}
}
Method (_Q17, 0, NotSerialized) // _Qxx: EC Query
{
Store (0x99, PO80) /* \PO80 */
If (CKDK ())
{
If (LAnd (LGreaterEqual (OSYS, 0x07D1), LNot (DKAP)))
{
Store (One, DPPR) /* \_SB_.PCI0.LPCB.EC0_.DPPR */
Sleep (0x14)
Notify (^^^PCIB.DOCK, Zero) // Bus Check
Signal (^^^PCIB.DKRQ)
}
Else
{
Store (One, DPPR) /* \_SB_.PCI0.LPCB.EC0_.DPPR */
Sleep (0x14)
Store (One, UNDK) /* \_SB_.UNDK */
Notify (VALG, 0x81) // Information Change
}
}
}
Method (_Q19, 0, NotSerialized) // _Qxx: EC Query
{
Sleep (0x32)
Notify (ADP0, Zero) // Bus Check
Notify (BAT0, 0x80) // Status Change
}
Method (_Q20, 0, NotSerialized) // _Qxx: EC Query
{
Notify (HAPS, 0x80) // Status Change
}
Method (_Q21, 0, NotSerialized) // _Qxx: EC Query
{
Notify (HAPS, 0x81) // Information Change
}
Method (_Q25, 0, NotSerialized) // _Qxx: EC Query
{
Store (0x25, PRM0) /* \PRM0 */
Store (0x89, SMIF) /* \SMIF */
Store (Zero, TRP0) /* \TRP0 */
}
Method (_Q26, 0, NotSerialized) // _Qxx: EC Query
{
Store (0x26, PRM0) /* \PRM0 */
Store (0x89, SMIF) /* \SMIF */
Store (Zero, TRP0) /* \TRP0 */
}
Method (_Q28, 0, NotSerialized) // _Qxx: EC Query
{
If (ECOK)
{
Store (BTST, Local2)
If (Local2)
{
Store (KSST, Local3)
If (Local3)
{
Store (One, BTON) /* \_SB_.PCI0.LPCB.EC0_.BTON */
Store (One, BION) /* \_SB_.PCI0.LPCB.EC0_.BION */
Store (Zero, BTPW) /* \BTPW */
Sleep (0xC8)
Store (One, BTRS) /* \BTRS */
Sleep (0x96)
Store (Zero, BTRS) /* \BTRS */
Sleep (0x14)
Store (One, BTRS) /* \BTRS */
}
}
}
Notify (BT, Zero) // Bus Check
}
Method (_Q29, 0, NotSerialized) // _Qxx: EC Query
{
If (ECOK)
{
Store (BTST, Local2)
If (Local2)
{
Store (Zero, BTON) /* \_SB_.PCI0.LPCB.EC0_.BTON */
Store (Zero, BION) /* \_SB_.PCI0.LPCB.EC0_.BION */
Store (Zero, BTRS) /* \BTRS */
Sleep (0x96)
Store (One, BTPW) /* \BTPW */
}
}
Notify (BT, Zero) // Bus Check
}
Method (_Q30, 0, NotSerialized) // _Qxx: EC Query
{
Store (0x30, PRM0) /* \PRM0 */
Store (0x89, SMIF) /* \SMIF */
Store (Zero, TRP0) /* \TRP0 */
}
Method (_Q31, 0, NotSerialized) // _Qxx: EC Query
{
Store (0x31, PRM0) /* \PRM0 */
Store (0x89, SMIF) /* \SMIF */
Store (Zero, TRP0) /* \TRP0 */
}
Method (_Q32, 0, NotSerialized) // _Qxx: EC Query
{
Store (0x32, PRM0) /* \PRM0 */
Store (0x89, SMIF) /* \SMIF */
Store (Zero, TRP0) /* \TRP0 */
}
Method (_Q33, 0, NotSerialized) // _Qxx: EC Query
{
Store (0x33, PRM0) /* \PRM0 */
Store (0x89, SMIF) /* \SMIF */
Store (Zero, TRP0) /* \TRP0 */
}
Method (_Q34, 0, NotSerialized) // _Qxx: EC Query
{
Store (0x34, PRM0) /* \PRM0 */
Store (0x89, SMIF) /* \SMIF */
Store (Zero, TRP0) /* \TRP0 */
}
Method (_Q40, 0, NotSerialized) // _Qxx: EC Query
{
Store (0x86, SMIF) /* \SMIF */
Store (Zero, TRP0) /* \TRP0 */
Notify (\_TZ.TZ00, 0x81) // Thermal Trip Point Change
Notify (\_TZ.TZ01, 0x81) // Thermal Trip Point Change
}
Method (_Q41, 0, NotSerialized) // _Qxx: EC Query
{
Store (PARM, ACPS) /* \ACPS */
Notify (\_PR.CPU0, 0x80) // Performance Capability Change
Sleep (0x64)
Notify (\_PR.CPU1, 0x80) // Performance Capability Change
}
Method (_Q52, 0, NotSerialized) // _Qxx: EC Query
{
Store (VGAS, Local0)
^^^PEGP.VGA.STBL (Local0)
}
Method (_Q53, 0, NotSerialized) // _Qxx: EC Query
{
Store (VGAS, Local0)
^^^GFX0.STBL (Local0)
}
Method (_Q54, 0, NotSerialized) // _Qxx: EC Query
{
Name (AUTO, Buffer (0x19)
{
/* 0000 */ 0x02, 0x02, 0x02, 0x03, 0x05, 0x02, 0x02, 0x02, /* ........ */
/* 0008 */ 0x03, 0x05, 0x01, 0x01, 0x01, 0x03, 0x05, 0x02, /* ........ */
/* 0010 */ 0x02, 0x02, 0x03, 0x05, 0x01, 0x01, 0x01, 0x03, /* ........ */
/* 0018 */ 0x05 /* . */
})
Name (LCDA, Buffer (0x19)
{
/* 0000 */ 0x03, 0x03, 0x03, 0x03, 0x05, 0x03, 0x03, 0x03, /* ........ */
/* 0008 */ 0x03, 0x05, 0x03, 0x03, 0x03, 0x03, 0x05, 0x03, /* ........ */
/* 0010 */ 0x03, 0x03, 0x03, 0x05, 0x03, 0x03, 0x03, 0x03, /* ........ */
/* 0018 */ 0x05 /* . */
})
Name (TRAT, Buffer (0x06)
{
0x00, 0x08, 0x01, 0x09, 0x02, 0x0A /* ...... */
})
Store (One, Local0)
If (EXTV)
{
If (LEqual (And (FNF5, 0x07), One))
{
Store (0x03, Local1)
}
Else
{
Store (0x05, Local1)
}
}
Else
{
If (LEqual (Zero, FNF5))
{
Store (One, Local0)
}
Else
{
If (LEqual (One, FNF5))
{
Store (0x04, Local0)
}
Else
{
If (LEqual (0x02, FNF5))
{
Store (0x02, Local0)
}
Else
{
If (LEqual (0x03, FNF5))
{
Store (0x05, Local0)
}
Else
{
Store (0x03, Local0)
}
}
}
}
If (LEqual (0x0B, DETD))
{
Multiply (Local0, One, Local0)
}
Else
{
If (LEqual (0x09, DETD))
{
Add (Local0, 0x05, Local0)
}
Else
{
If (LEqual (0x0A, DETD))
{
Add (Local0, 0x0A, Local0)
}
Else
{
If (LEqual (0x08, DETD))
{
Add (Local0, 0x14, Local0)
}
Else
{
Add (Local0, 0x0F, Local0)
}
}
}
}
Subtract (Local0, One, Local0)
If (IGDB)
{
CreateByteField (LCDA, Local0, ACTA)
Store (ACTA, Local1)
}
Else
{
CreateByteField (AUTO, Local0, ACTL)
Store (ACTL, Local1)
}
}
And (Local1, 0x07, Local1)
Store (0x85, SMIF) /* \SMIF */
Store (Zero, TRP0) /* \TRP0 */
CreateByteField (TRAT, Local1, STB0)
If (LNotEqual (STB0, CADL))
{
Store (STB0, FNF5) /* \FNF5 */
Store (One, TLST) /* \TLST */
HKDS (0x0A)
}
}
Method (_Q55, 0, NotSerialized) // _Qxx: EC Query
{
Name (S3TL, Buffer (0x07)
{
0x01, 0x03, 0x02, 0x05, 0x04, 0x09, 0x08 /* ....... */
})
Name (FNFT, Buffer (0x07)
{
0x01, 0x05, 0x02, 0x06, 0x03, 0x07, 0x04 /* ....... */
})
Name (DETT, Buffer (0x10)
{
/* 0000 */ 0x23, 0x0E, 0x07, 0x00, 0x23, 0x0E, 0x07, 0x00, /* #...#... */
/* 0008 */ 0x1C, 0x1C, 0x1C, 0x1C, 0x1C, 0x1C, 0x1C, 0x1C /* ........ */
})
Name (AUTO, Buffer (0x2A)
{
/* 0000 */ 0x02, 0x02, 0x02, 0x01, 0x03, 0x05, 0x01, 0x02, /* ........ */
/* 0008 */ 0x02, 0x02, 0x01, 0x03, 0x05, 0x01, 0x01, 0x01, /* ........ */
/* 0010 */ 0x01, 0x01, 0x03, 0x05, 0x01, 0x08, 0x08, 0x08, /* ........ */
/* 0018 */ 0x08, 0x08, 0x05, 0x09, 0x08, 0x08, 0x08, 0x08, /* ........ */
/* 0020 */ 0x08, 0x05, 0x09, 0x01, 0x01, 0x01, 0x01, 0x03, /* ........ */
/* 0028 */ 0x05, 0x01 /* .. */
})
Name (LCDA, Buffer (0x2A)
{
/* 0000 */ 0x03, 0x03, 0x03, 0x01, 0x03, 0x05, 0x01, 0x03, /* ........ */
/* 0008 */ 0x03, 0x03, 0x01, 0x03, 0x05, 0x01, 0x03, 0x03, /* ........ */
/* 0010 */ 0x03, 0x01, 0x03, 0x05, 0x01, 0x09, 0x09, 0x09, /* ........ */
/* 0018 */ 0x09, 0x09, 0x05, 0x09, 0x09, 0x09, 0x09, 0x09, /* ........ */
/* 0020 */ 0x09, 0x05, 0x09, 0x03, 0x03, 0x03, 0x01, 0x03, /* ........ */
/* 0028 */ 0x05, 0x01 /* .. */
})
If (EXTV)
{
If (LEqual (And (FNF5, 0x07), One))
{
Store (0x03, Local1)
}
Else
{
If (LEqual (And (FNF5, 0x07), 0x03))
{
Store (0x05, Local1)
}
Else
{
Store (0x09, Local1)
}
}
}
Else
{
Store (Zero, Local0)
If (LEqual (0x03, PMMD))
{
CreateByteField (S3TL, FNF5, STS3)
Store (STS3, Local1)
Sleep (0x0DAC)
}
Else
{
CreateByteField (FNFT, FNF5, NFN5)
CreateByteField (DETT, DETD, NDET)
Add (NFN5, Local0, Local0)
Add (NDET, Local0, Local0)
Subtract (Local0, One, Local0)
If (IGDB)
{
CreateByteField (LCDA, Local0, ACTA)
Store (ACTA, Local1)
}
Else
{
CreateByteField (AUTO, Local0, ACTL)
Store (ACTL, Local1)
}
}
}
If (LEqual (0x04, PMMD))
{
Sleep (0x03E8)
}
Store (Local1, PRM0) /* \PRM0 */
Store (0x94, SMIF) /* \SMIF */
Store (Zero, TRP0) /* \TRP0 */
}
Method (_Q56, 0, NotSerialized) // _Qxx: EC Query
{
If (DKAP)
{
XDSP ()
}
}
}
Device (DMAC)
{
Name (_HID, EisaId ("PNP0200") /* PC-class DMA Controller */) // _HID: Hardware ID
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
{
IO (Decode16,
0x0000, // Range Minimum
0x0000, // Range Maximum
0x01, // Alignment
0x20, // Length
)
IO (Decode16,
0x0081, // Range Minimum
0x0081, // Range Maximum
0x01, // Alignment
0x11, // Length
)
IO (Decode16,
0x0093, // Range Minimum
0x0093, // Range Maximum
0x01, // Alignment
0x0D, // Length
)
IO (Decode16,
0x00C0, // Range Minimum
0x00C0, // Range Maximum
0x01, // Alignment
0x20, // Length
)
DMA (Compatibility, NotBusMaster, Transfer8_16, )
{4}
})
}
Device (FWHD)
{
Name (_HID, EisaId ("INT0800") /* Intel 82802 Firmware Hub Device */) // _HID: Hardware ID
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
{
Memory32Fixed (ReadOnly,
0xFF000000, // Address Base
0x01000000, // Address Length
)
})
}
Device (HPET)
{
Name (_HID, EisaId ("PNP0103") /* HPET System Timer */) // _HID: Hardware ID
Name (_CID, EisaId ("PNP0C01") /* System Board */) // _CID: Compatible ID
Name (BUF0, ResourceTemplate ()
{
Memory32Fixed (ReadOnly,
0xFED00000, // Address Base
0x00000400, // Address Length
_Y0F)
})
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (LGreaterEqual (OSYS, 0x07D1))
{
If (HPAE)
{
Return (0x0F)
}
}
Else
{
If (HPAE)
{
Return (0x0B)
}
}
Return (Zero)
}
Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
{
If (HPAE)
{
CreateDWordField (BUF0, \_SB.PCI0.LPCB.HPET._Y0F._BAS, HPT0) // _BAS: Base Address
If (LEqual (HPAS, One))
{
Store (0xFED01000, HPT0) /* \_SB_.PCI0.LPCB.HPET._CRS.HPT0 */
}
If (LEqual (HPAS, 0x02))
{
Store (0xFED02000, HPT0) /* \_SB_.PCI0.LPCB.HPET._CRS.HPT0 */
}
If (LEqual (HPAS, 0x03))
{
Store (0xFED03000, HPT0) /* \_SB_.PCI0.LPCB.HPET._CRS.HPT0 */
}
}
Return (BUF0) /* \_SB_.PCI0.LPCB.HPET.BUF0 */
}
}
Device (IPIC)
{
Name (_HID, EisaId ("PNP0000") /* 8259-compatible Programmable Interrupt Controller */) // _HID: Hardware ID
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
{
IO (Decode16,
0x0020, // Range Minimum
0x0020, // Range Maximum
0x01, // Alignment
0x02, // Length
)
IO (Decode16,
0x0024, // Range Minimum
0x0024, // Range Maximum
0x01, // Alignment
0x02, // Length
)
IO (Decode16,
0x0028, // Range Minimum
0x0028, // Range Maximum
0x01, // Alignment
0x02, // Length
)
IO (Decode16,
0x002C, // Range Minimum
0x002C, // Range Maximum
0x01, // Alignment
0x02, // Length
)
IO (Decode16,
0x0030, // Range Minimum
0x0030, // Range Maximum
0x01, // Alignment
0x02, // Length
)
IO (Decode16,
0x0034, // Range Minimum
0x0034, // Range Maximum
0x01, // Alignment
0x02, // Length
)
IO (Decode16,
0x0038, // Range Minimum
0x0038, // Range Maximum
0x01, // Alignment
0x02, // Length
)
IO (Decode16,
0x003C, // Range Minimum
0x003C, // Range Maximum
0x01, // Alignment
0x02, // Length
)
IO (Decode16,
0x00A0, // Range Minimum
0x00A0, // Range Maximum
0x01, // Alignment
0x02, // Length
)
IO (Decode16,
0x00A4, // Range Minimum
0x00A4, // Range Maximum
0x01, // Alignment
0x02, // Length
)
IO (Decode16,
0x00A8, // Range Minimum
0x00A8, // Range Maximum
0x01, // Alignment
0x02, // Length
)
IO (Decode16,
0x00AC, // Range Minimum
0x00AC, // Range Maximum
0x01, // Alignment
0x02, // Length
)
IO (Decode16,
0x00B0, // Range Minimum
0x00B0, // Range Maximum
0x01, // Alignment
0x02, // Length
)
IO (Decode16,
0x00B4, // Range Minimum
0x00B4, // Range Maximum
0x01, // Alignment
0x02, // Length
)
IO (Decode16,
0x00B8, // Range Minimum
0x00B8, // Range Maximum
0x01, // Alignment
0x02, // Length
)
IO (Decode16,
0x00BC, // Range Minimum
0x00BC, // Range Maximum
0x01, // Alignment
0x02, // Length
)
IO (Decode16,
0x04D0, // Range Minimum
0x04D0, // Range Maximum
0x01, // Alignment
0x02, // Length
)
IRQNoFlags ()
{2}
})
}
Device (MATH)
{
Name (_HID, EisaId ("PNP0C04") /* x87-compatible Floating Point Processing Unit */) // _HID: Hardware ID
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
{
IO (Decode16,
0x00F0, // Range Minimum
0x00F0, // Range Maximum
0x01, // Alignment
0x01, // Length
)
IRQNoFlags ()
{13}
})
}
Device (LDRC)
{
Name (_HID, EisaId ("PNP0C02") /* PNP Motherboard Resources */) // _HID: Hardware ID
Name (_UID, 0x02) // _UID: Unique ID
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
{
IO (Decode16,
0x002E, // Range Minimum
0x002E, // Range Maximum
0x01, // Alignment
0x02, // Length
)
IO (Decode16,
0x0061, // Range Minimum
0x0061, // Range Maximum
0x01, // Alignment
0x01, // Length
)
IO (Decode16,
0x0063, // Range Minimum
0x0063, // Range Maximum
0x01, // Alignment
0x01, // Length
)
IO (Decode16,
0x0065, // Range Minimum
0x0065, // Range Maximum
0x01, // Alignment
0x01, // Length
)
IO (Decode16,
0x0067, // Range Minimum
0x0067, // Range Maximum
0x01, // Alignment
0x01, // Length
)
IO (Decode16,
0x0070, // Range Minimum
0x0070, // Range Maximum
0x01, // Alignment
0x01, // Length
)
IO (Decode16,
0x0080, // Range Minimum
0x0080, // Range Maximum
0x01, // Alignment
0x01, // Length
)
IO (Decode16,
0x0092, // Range Minimum
0x0092, // Range Maximum
0x01, // Alignment
0x01, // Length
)
IO (Decode16,
0x00B2, // Range Minimum
0x00B2, // Range Maximum
0x01, // Alignment
0x02, // Length
)
IO (Decode16,
0x0400, // Range Minimum
0x0400, // Range Maximum
0x01, // Alignment
0x02, // Length
)
IO (Decode16,
0x0680, // Range Minimum
0x0680, // Range Maximum
0x01, // Alignment
0x20, // Length
)
IO (Decode16,
0x0800, // Range Minimum
0x0800, // Range Maximum
0x01, // Alignment
0x10, // Length
)
IO (Decode16,
0x1000, // Range Minimum
0x1000, // Range Maximum
0x01, // Alignment
0x80, // Length
)
IO (Decode16,
0x1180, // Range Minimum
0x1180, // Range Maximum
0x01, // Alignment
0x40, // Length
)
IO (Decode16,
0x1640, // Range Minimum
0x1640, // Range Maximum
0x01, // Alignment
0x10, // Length
)
})
}
Device (RTC)
{
Name (_HID, EisaId ("PNP0B00") /* AT Real-Time Clock */) // _HID: Hardware ID
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
{
IO (Decode16,
0x0070, // Range Minimum
0x0070, // Range Maximum
0x01, // Alignment
0x08, // Length
)
IRQNoFlags ()
{8}
})
}
Device (TIMR)
{
Name (_HID, EisaId ("PNP0100") /* PC-class System Timer */) // _HID: Hardware ID
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
{
IO (Decode16,
0x0040, // Range Minimum
0x0040, // Range Maximum
0x01, // Alignment
0x04, // Length
)
IO (Decode16,
0x0050, // Range Minimum
0x0050, // Range Maximum
0x10, // Alignment
0x04, // Length
)
IRQNoFlags ()
{0}
})
}
Device (TPM)
{
Name (_HID, EisaId ("IFX0102")) // _HID: Hardware ID
Name (_CID, EisaId ("PNP0C31")) // _CID: Compatible ID
Name (_UID, One) // _UID: Unique ID
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
{
IO (Decode16,
0x004E, // Range Minimum
0x004E, // Range Maximum
0x01, // Alignment
0x02, // Length
)
IO (Decode16,
0x1670, // Range Minimum
0x1670, // Range Maximum
0x01, // Alignment
0x10, // Length
)
Memory32Fixed (ReadWrite,
0xFED40000, // Address Base
0x00005000, // Address Length
)
})
OperationRegion (TPIO, SystemIO, 0x4E, 0x02)
Field (TPIO, ByteAcc, NoLock, Preserve)
{
TINX, 8,
TDAT, 8
}
IndexField (TINX, TDAT, ByteAcc, NoLock, Preserve)
{
Offset (0x20),
CHID, 8
}
Mutex (TPLK, 0x00)
Method (_STA, 0, NotSerialized) // _STA: Status
{
Acquire (TPLK, 0xFFFF)
Store (0x55, TINX) /* \_SB_.PCI0.LPCB.TPM_.TINX */
Store (CHID, Local0)
Store (0xAA, TINX) /* \_SB_.PCI0.LPCB.TPM_.TINX */
Release (TPLK)
If (LEqual (Local0, 0x0B))
{
Return (0x0F)
}
Else
{
Return (Zero)
}
}
}
Device (SIO1)
{
Name (_HID, EisaId ("PNP0A05") /* Generic Container Device */) // _HID: Hardware ID
Name (_UID, One) // _UID: Unique ID
Mutex (MX00, 0x00)
OperationRegion (VSIO, SystemIO, 0x2E, 0x02)
Field (VSIO, ByteAcc, NoLock, Preserve)
{
I359, 8,
D359, 8
}
IndexField (I359, D359, ByteAcc, NoLock, Preserve)
{
Offset (0x07),
LDNM, 8,
Offset (0x22),
PWCT, 8,
PWMG, 8,
Offset (0x25),
DEMD, 8
}
IndexField (I359, D359, ByteAcc, NoLock, Preserve)
{
Offset (0x30),
ACTI, 8,
Offset (0x60),
IOBH, 8,
IOBL, 8,
I2BH, 8,
I2BL, 8,
Offset (0x70),
IRQX, 8,
Offset (0x74),
DMAX, 8,
Offset (0xE0),
HAR, 8,
Offset (0xF0),
MODX, 8,
OPTX, 8
}
Method (ENCG, 0, NotSerialized)
{
Acquire (MX00, 0xFFFF)
Store (0x55, I359) /* \_SB_.PCI0.LPCB.SIO1.I359 */
Store (0x10, LDNM) /* \_SB_.PCI0.LPCB.SIO1.LDNM */
Or (HAR, 0x02, HAR) /* \_SB_.PCI0.LPCB.SIO1.HAR_ */
Or (HAR, One, HAR) /* \_SB_.PCI0.LPCB.SIO1.HAR_ */
}
Method (EXCG, 0, NotSerialized)
{
Store (0x10, LDNM) /* \_SB_.PCI0.LPCB.SIO1.LDNM */
Store (Zero, HAR) /* \_SB_.PCI0.LPCB.SIO1.HAR_ */
Store (0xAA, I359) /* \_SB_.PCI0.LPCB.SIO1.I359 */
Release (MX00)
}
Method (SDEV, 1, NotSerialized)
{
Store (0x07, I359) /* \_SB_.PCI0.LPCB.SIO1.I359 */
Store (Arg0, D359) /* \_SB_.PCI0.LPCB.SIO1.D359 */
}
Method (RDRG, 1, NotSerialized)
{
Store (Arg0, I359) /* \_SB_.PCI0.LPCB.SIO1.I359 */
Store (D359, Local0)
Return (Local0)
}
Method (WRRG, 2, NotSerialized)
{
Store (Arg0, I359) /* \_SB_.PCI0.LPCB.SIO1.I359 */
Store (Arg1, D359) /* \_SB_.PCI0.LPCB.SIO1.D359 */
}
Method (READ, 3, NotSerialized)
{
Acquire (MX00, 0xFFFF)
If (LEqual (Arg0, Zero))
{
Store (RDRG (Arg1), Local1)
}
And (Local1, Arg2, Local1)
Release (MX00)
Return (Local1)
}
Method (WRIT, 3, NotSerialized)
{
Acquire (MX00, 0xFFFF)
If (LEqual (Arg0, Zero))
{
WRRG (Arg1, Arg2)
}
Release (MX00)
}
Device (UAR1)
{
Name (_HID, EisaId ("PNP0501") /* 16550A-compatible COM Serial Port */) // _HID: Hardware ID
Name (BUF0, ResourceTemplate ()
{
IO (Decode16,
0x03F8, // Range Minimum
0x03F8, // Range Maximum
0x01, // Alignment
0x08, // Length
_Y10)
IRQNoFlags (_Y11)
{4}
})
Name (RSRC, ResourceTemplate ()
{
IO (Decode16,
0x0000, // Range Minimum
0x0000, // Range Maximum
0x00, // Alignment
0x00, // Length
)
IRQNoFlags ()
{}
})
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (LNot (GP15))
{
Return (Zero)
}
If (LNot (LSER))
{
Return (Zero)
}
If (CMAP)
{
ENCG ()
SDEV (0x04)
Store (ACTI, Local0)
Store (PWCT, Local1)
And (Local1, 0x10, Local1)
EXCG ()
If (LEqual (Local0, Zero))
{
Return (0x0D)
}
If (LNotEqual (Local1, 0x10))
{
Return (0x0D)
}
Return (0x0F)
}
Return (Zero)
}
Method (_DIS, 0, NotSerialized) // _DIS: Disable Device
{
ENCG ()
SDEV (0x04)
Store (Zero, ACTI) /* \_SB_.PCI0.LPCB.SIO1.ACTI */
Store (PWCT, Local0)
And (Local0, 0xEF, Local0)
Store (Local0, PWCT) /* \_SB_.PCI0.LPCB.SIO1.PWCT */
EXCG ()
}
Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
{
If (LEqual (_STA (), 0x0F))
{
CreateByteField (BUF0, \_SB.PCI0.LPCB.SIO1.UAR1._Y10._MIN, IOLO) // _MIN: Minimum Base Address
CreateByteField (BUF0, 0x03, IOHI)
CreateByteField (BUF0, \_SB.PCI0.LPCB.SIO1.UAR1._Y10._MAX, IORL) // _MAX: Maximum Base Address
CreateByteField (BUF0, 0x05, IORH)
CreateByteField (BUF0, \_SB.PCI0.LPCB.SIO1.UAR1._Y11._INT, IRQL) // _INT: Interrupts
ENCG ()
SDEV (0x04)
Store (IOBH, Local0)
Store (Local0, IOHI) /* \_SB_.PCI0.LPCB.SIO1.UAR1._CRS.IOHI */
Store (IOBL, Local0)
Store (Local0, IOLO) /* \_SB_.PCI0.LPCB.SIO1.UAR1._CRS.IOLO */
Store (IOLO, IORL) /* \_SB_.PCI0.LPCB.SIO1.UAR1._CRS.IORL */
Store (IOHI, IORH) /* \_SB_.PCI0.LPCB.SIO1.UAR1._CRS.IORH */
Store (IRQX, Local0)
Store (One, Local1)
ShiftLeft (Local1, Local0, IRQL) /* \_SB_.PCI0.LPCB.SIO1.UAR1._CRS.IRQL */
EXCG ()
Return (BUF0) /* \_SB_.PCI0.LPCB.SIO1.UAR1.BUF0 */
}
Else
{
Return (RSRC) /* \_SB_.PCI0.LPCB.SIO1.UAR1.RSRC */
}
}
Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings
{
StartDependentFn (0x00, 0x01)
{
IO (Decode16,
0x03F8, // Range Minimum
0x03F8, // Range Maximum
0x01, // Alignment
0x08, // Length
)
IRQNoFlags ()
{4}
}
StartDependentFn (0x00, 0x01)
{
IO (Decode16,
0x02F8, // Range Minimum
0x02F8, // Range Maximum
0x01, // Alignment
0x08, // Length
)
IRQNoFlags ()
{3}
}
StartDependentFn (0x00, 0x01)
{
IO (Decode16,
0x03E8, // Range Minimum
0x03E8, // Range Maximum
0x01, // Alignment
0x08, // Length
)
IRQNoFlags ()
{4}
}
StartDependentFn (0x00, 0x01)
{
IO (Decode16,
0x02E8, // Range Minimum
0x02E8, // Range Maximum
0x01, // Alignment
0x08, // Length
)
IRQNoFlags ()
{3}
}
EndDependentFn ()
})
Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings
{
CreateByteField (Arg0, 0x02, IOLO)
CreateByteField (Arg0, 0x03, IOHI)
CreateByteField (Arg0, 0x09, IRQL)
ENCG ()
SDEV (0x04)
Store (Zero, ACTI) /* \_SB_.PCI0.LPCB.SIO1.ACTI */
Store (PWCT, Local0)
And (Local0, 0xEF, Local0)
Store (Local0, PWCT) /* \_SB_.PCI0.LPCB.SIO1.PWCT */
Store (IOHI, Local0)
Store (Local0, IOBH) /* \_SB_.PCI0.LPCB.SIO1.IOBH */
Store (IOLO, Local0)
Store (Local0, IOBL) /* \_SB_.PCI0.LPCB.SIO1.IOBL */
FindSetRightBit (IRQL, Local0)
Decrement (Local0)
Store (Local0, IRQX) /* \_SB_.PCI0.LPCB.SIO1.IRQX */
Store (PWCT, Local0)
Or (Local0, 0x10, Local0)
Store (Local0, PWCT) /* \_SB_.PCI0.LPCB.SIO1.PWCT */
Store (One, ACTI) /* \_SB_.PCI0.LPCB.SIO1.ACTI */
EXCG ()
And (IOD0, 0xF8, IOD0) /* \_SB_.PCI0.LPCB.IOD0 */
If (LEqual (IOHI, 0x03))
{
If (LEqual (IOLO, 0xF8))
{
Or (IOD0, Zero, IOD0) /* \_SB_.PCI0.LPCB.IOD0 */
}
Else
{
Or (IOD0, 0x07, IOD0) /* \_SB_.PCI0.LPCB.IOD0 */
}
}
Else
{
If (LEqual (IOLO, 0xF8))
{
Or (IOD0, One, IOD0) /* \_SB_.PCI0.LPCB.IOD0 */
}
Else
{
Or (IOD0, 0x05, IOD0) /* \_SB_.PCI0.LPCB.IOD0 */
}
}
}
Method (_PSC, 0, NotSerialized) // _PSC: Power State Current
{
ENCG ()
And (PWCT, 0x10, Local0)
EXCG ()
If (Local0)
{
Return (Zero)
}
Else
{
Return (0x03)
}
}
Method (_PS0, 0, NotSerialized) // _PS0: Power State 0
{
ENCG ()
Or (PWCT, 0x10, PWCT) /* \_SB_.PCI0.LPCB.SIO1.PWCT */
EXCG ()
}
Method (_PS3, 0, NotSerialized) // _PS3: Power State 3
{
ENCG ()
And (PWCT, 0xEF, PWCT) /* \_SB_.PCI0.LPCB.SIO1.PWCT */
EXCG ()
}
}
Device (FIR)
{
Name (_HID, EisaId ("SMCF010")) // _HID: Hardware ID
Name (BUF0, ResourceTemplate ()
{
IO (Decode16,
0x02F8, // Range Minimum
0x02F8, // Range Maximum
0x01, // Alignment
0x08, // Length
_Y12)
IO (Decode16,
0x0158, // Range Minimum
0x0158, // Range Maximum
0x01, // Alignment
0x08, // Length
_Y13)
IRQNoFlags (_Y14)
{3}
DMA (Compatibility, NotBusMaster, Transfer8, _Y15)
{3}
})
Name (RSRC, ResourceTemplate ()
{
IO (Decode16,
0x0000, // Range Minimum
0x0000, // Range Maximum
0x00, // Alignment
0x00, // Length
)
IO (Decode16,
0x0000, // Range Minimum
0x0000, // Range Maximum
0x00, // Alignment
0x00, // Length
)
IRQNoFlags ()
{}
DMA (Compatibility, NotBusMaster, Transfer8, )
{}
})
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (LNot (GP13))
{
Return (Zero)
}
If (LNot (LFIR))
{
Return (Zero)
}
If (CMBP)
{
ENCG ()
SDEV (0x05)
Store (ACTI, Local0)
Store (PWCT, Local1)
And (Local1, 0x20, Local1)
EXCG ()
If (LEqual (Local0, Zero))
{
Return (0x0D)
}
If (LNotEqual (Local1, 0x20))
{
Return (0x0D)
}
Return (0x0F)
}
Return (Zero)
}
Method (_DIS, 0, NotSerialized) // _DIS: Disable Device
{
ENCG ()
SDEV (0x05)
Store (Zero, ACTI) /* \_SB_.PCI0.LPCB.SIO1.ACTI */
Store (PWCT, Local0)
And (Local0, 0xDF, Local0)
Store (Local0, PWCT) /* \_SB_.PCI0.LPCB.SIO1.PWCT */
EXCG ()
}
Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
{
If (LEqual (_STA (), 0x0F))
{
CreateByteField (BUF0, \_SB.PCI0.LPCB.SIO1.FIR._Y12._MIN, IOLO) // _MIN: Minimum Base Address
CreateByteField (BUF0, 0x03, IOHI)
CreateByteField (BUF0, \_SB.PCI0.LPCB.SIO1.FIR._Y12._MAX, IORL) // _MAX: Maximum Base Address
CreateByteField (BUF0, 0x05, IORH)
CreateByteField (BUF0, \_SB.PCI0.LPCB.SIO1.FIR._Y13._MIN, I2LO) // _MIN: Minimum Base Address
CreateByteField (BUF0, 0x0B, I2HI)
CreateByteField (BUF0, \_SB.PCI0.LPCB.SIO1.FIR._Y13._MAX, I2RL) // _MAX: Maximum Base Address
CreateByteField (BUF0, 0x0D, I2RH)
CreateByteField (BUF0, \_SB.PCI0.LPCB.SIO1.FIR._Y14._INT, IRQL) // _INT: Interrupts
CreateByteField (BUF0, 0x12, IRQH)
CreateByteField (BUF0, \_SB.PCI0.LPCB.SIO1.FIR._Y15._DMA, DMAC) // _DMA: Direct Memory Access
ENCG ()
SDEV (0x05)
Store (IOBH, Local0)
Store (Local0, IOHI) /* \_SB_.PCI0.LPCB.SIO1.FIR_._CRS.IOHI */
Store (IOBL, Local0)
Store (Local0, IOLO) /* \_SB_.PCI0.LPCB.SIO1.FIR_._CRS.IOLO */
Store (IOLO, IORL) /* \_SB_.PCI0.LPCB.SIO1.FIR_._CRS.IORL */
Store (IOHI, IORH) /* \_SB_.PCI0.LPCB.SIO1.FIR_._CRS.IORH */
Store (I2BH, Local0)
Store (Local0, I2HI) /* \_SB_.PCI0.LPCB.SIO1.FIR_._CRS.I2HI */
Store (I2BL, Local0)
Store (Local0, I2LO) /* \_SB_.PCI0.LPCB.SIO1.FIR_._CRS.I2LO */
Store (I2LO, I2RL) /* \_SB_.PCI0.LPCB.SIO1.FIR_._CRS.I2RL */
Store (I2HI, I2RH) /* \_SB_.PCI0.LPCB.SIO1.FIR_._CRS.I2RH */
Store (IRQX, Local0)
Store (One, Local1)
ShiftLeft (Local1, Local0, IRQL) /* \_SB_.PCI0.LPCB.SIO1.FIR_._CRS.IRQL */
Store (DMAX, Local0)
Store (One, Local1)
ShiftLeft (Local1, Local0, DMAC) /* \_SB_.PCI0.LPCB.SIO1.FIR_._CRS.DMAC */
EXCG ()
Return (BUF0) /* \_SB_.PCI0.LPCB.SIO1.FIR_.BUF0 */
}
Else
{
Return (RSRC) /* \_SB_.PCI0.LPCB.SIO1.FIR_.RSRC */
}
}
Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings
{
StartDependentFn (0x00, 0x01)
{
IO (Decode16,
0x02F8, // Range Minimum
0x02F8, // Range Maximum
0x01, // Alignment
0x08, // Length
)
IO (Decode16,
0x0158, // Range Minimum
0x0158, // Range Maximum
0x01, // Alignment
0x08, // Length
)
IRQNoFlags ()
{3}
DMA (Compatibility, NotBusMaster, Transfer8, )
{3}
}
StartDependentFn (0x00, 0x01)
{
IO (Decode16,
0x02E8, // Range Minimum
0x02E8, // Range Maximum
0x01, // Alignment
0x08, // Length
)
IO (Decode16,
0x0148, // Range Minimum
0x0148, // Range Maximum
0x01, // Alignment
0x08, // Length
)
IRQNoFlags ()
{3}
DMA (Compatibility, NotBusMaster, Transfer8, )
{3}
}
StartDependentFn (0x00, 0x01)
{
IO (Decode16,
0x03F8, // Range Minimum
0x03F8, // Range Maximum
0x01, // Alignment
0x08, // Length
)
IO (Decode16,
0x0258, // Range Minimum
0x0258, // Range Maximum
0x01, // Alignment
0x08, // Length
)
IRQNoFlags ()
{4}
DMA (Compatibility, NotBusMaster, Transfer8, )
{3}
}
StartDependentFn (0x00, 0x01)
{
IO (Decode16,
0x03E8, // Range Minimum
0x03E8, // Range Maximum
0x01, // Alignment
0x08, // Length
)
IO (Decode16,
0x0248, // Range Minimum
0x0248, // Range Maximum
0x01, // Alignment
0x08, // Length
)
IRQNoFlags ()
{4}
DMA (Compatibility, NotBusMaster, Transfer8, )
{3}
}
StartDependentFn (0x00, 0x01)
{
IO (Decode16,
0x02F8, // Range Minimum
0x02F8, // Range Maximum
0x01, // Alignment
0x08, // Length
)
IO (Decode16,
0x0158, // Range Minimum
0x0158, // Range Maximum
0x01, // Alignment
0x08, // Length
)
IRQNoFlags ()
{3}
DMA (Compatibility, NotBusMaster, Transfer8, )
{1}
}
StartDependentFn (0x00, 0x01)
{
IO (Decode16,
0x02E8, // Range Minimum
0x02E8, // Range Maximum
0x01, // Alignment
0x08, // Length
)
IO (Decode16,
0x0148, // Range Minimum
0x0148, // Range Maximum
0x01, // Alignment
0x08, // Length
)
IRQNoFlags ()
{3}
DMA (Compatibility, NotBusMaster, Transfer8, )
{1}
}
StartDependentFn (0x00, 0x01)
{
IO (Decode16,
0x03F8, // Range Minimum
0x03F8, // Range Maximum
0x01, // Alignment
0x08, // Length
)
IO (Decode16,
0x0258, // Range Minimum
0x0258, // Range Maximum
0x01, // Alignment
0x08, // Length
)
IRQNoFlags ()
{4}
DMA (Compatibility, NotBusMaster, Transfer8, )
{1}
}
StartDependentFn (0x00, 0x01)
{
IO (Decode16,
0x03E8, // Range Minimum
0x03E8, // Range Maximum
0x01, // Alignment
0x08, // Length
)
IO (Decode16,
0x0248, // Range Minimum
0x0248, // Range Maximum
0x01, // Alignment
0x08, // Length
)
IRQNoFlags ()
{4}
DMA (Compatibility, NotBusMaster, Transfer8, )
{1}
}
EndDependentFn ()
})
Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings
{
CreateByteField (Arg0, 0x02, IOLO)
CreateByteField (Arg0, 0x03, IOHI)
CreateByteField (Arg0, 0x04, IORL)
CreateByteField (Arg0, 0x05, IORH)
CreateByteField (Arg0, 0x0A, I2LO)
CreateByteField (Arg0, 0x0B, I2HI)
CreateByteField (Arg0, 0x0C, I2RL)
CreateByteField (Arg0, 0x0D, I2RH)
CreateByteField (Arg0, 0x11, IRQL)
CreateByteField (Arg0, 0x12, IRQH)
CreateByteField (Arg0, 0x14, DMAC)
ENCG ()
SDEV (0x05)
Store (IOHI, Local0)
Store (Local0, IOBH) /* \_SB_.PCI0.LPCB.SIO1.IOBH */
Store (IOLO, Local0)
Store (Local0, IOBL) /* \_SB_.PCI0.LPCB.SIO1.IOBL */
Store (I2HI, Local0)
Store (Local0, I2BH) /* \_SB_.PCI0.LPCB.SIO1.I2BH */
Store (I2LO, Local0)
Store (Local0, I2BL) /* \_SB_.PCI0.LPCB.SIO1.I2BL */
FindSetRightBit (IRQL, Local0)
Decrement (Local0)
Store (Local0, IRQX) /* \_SB_.PCI0.LPCB.SIO1.IRQX */
FindSetRightBit (DMAC, Local0)
Decrement (Local0)
Store (Local0, DMAX) /* \_SB_.PCI0.LPCB.SIO1.DMAX */
EXCG ()
And (IOD0, 0x8F, IOD0) /* \_SB_.PCI0.LPCB.IOD0 */
If (LEqual (IOHI, 0x03))
{
If (LEqual (IOLO, 0xF8))
{
Or (IOD0, Zero, IOD0) /* \_SB_.PCI0.LPCB.IOD0 */
Store (0x58, GD3L) /* \_SB_.PCI0.LPCB.GD3L */
}
Else
{
Or (IOD0, 0x70, IOD0) /* \_SB_.PCI0.LPCB.IOD0 */
Store (0x48, GD3L) /* \_SB_.PCI0.LPCB.GD3L */
}
Store (0x02, GD3H) /* \_SB_.PCI0.LPCB.GD3H */
Store (0x0C, GD3M) /* \_SB_.PCI0.LPCB.GD3M */
Or (GD3L, One, GD3L) /* \_SB_.PCI0.LPCB.GD3L */
}
Else
{
If (LEqual (IOLO, 0xF8))
{
Or (IOD0, 0x10, IOD0) /* \_SB_.PCI0.LPCB.IOD0 */
Store (0x58, GD3L) /* \_SB_.PCI0.LPCB.GD3L */
}
Else
{
Or (IOD0, 0x50, IOD0) /* \_SB_.PCI0.LPCB.IOD0 */
Store (0x48, GD3L) /* \_SB_.PCI0.LPCB.GD3L */
}
Store (One, GD3H) /* \_SB_.PCI0.LPCB.GD3H */
Store (0x0C, GD3M) /* \_SB_.PCI0.LPCB.GD3M */
Or (GD3L, One, GD3L) /* \_SB_.PCI0.LPCB.GD3L */
}
}
Method (_PSC, 0, NotSerialized) // _PSC: Power State Current
{
ENCG ()
And (PWCT, 0x20, Local0)
EXCG ()
If (Local0)
{
Return (Zero)
}
Else
{
Return (0x03)
}
}
Method (_PS0, 0, NotSerialized) // _PS0: Power State 0
{
ENCG ()
Or (PWCT, 0x20, PWCT) /* \_SB_.PCI0.LPCB.SIO1.PWCT */
EXCG ()
}
Method (_PS3, 0, NotSerialized) // _PS3: Power State 3
{
ENCG ()
And (PWCT, 0xDF, PWCT) /* \_SB_.PCI0.LPCB.SIO1.PWCT */
EXCG ()
}
}
}
Device (SIO2)
{
Name (_HID, EisaId ("PNP0A05") /* Generic Container Device */) // _HID: Hardware ID
Name (_UID, 0x02) // _UID: Unique ID
Mutex (S1K, 0x00)
OperationRegion (SMSC, SystemIO, 0x164E, 0x02)
Field (SMSC, ByteAcc, Lock, Preserve)
{
INDX, 8,
DATA, 8
}
IndexField (INDX, DATA, AnyAcc, NoLock, Preserve)
{
AccessAs (ByteAcc, 0x00),
Offset (0x01),
, 2,
LPD, 1,
LMD, 1,
Offset (0x02),
, 7,
U2PD, 1,
Offset (0x04),
LEMD, 2,
Offset (0x05),
Offset (0x0A),
, 6,
IROM, 2,
Offset (0x0C),
, 3,
U2MD, 3,
Offset (0x0D),
CR0D, 8,
Offset (0x23),
CR23, 8,
Offset (0x25),
CR25, 8,
LDMA, 8,
LIRQ, 8,
CR28, 8,
Offset (0x2B),
CR2B, 8,
CR2C, 8
}
Method (ENFG, 0, NotSerialized)
{
Store (0x55, INDX) /* \_SB_.PCI0.LPCB.SIO2.INDX */
}
Method (EXFG, 0, NotSerialized)
{
Store (0xAA, INDX) /* \_SB_.PCI0.LPCB.SIO2.INDX */
}
Name (UST, Zero)
Name (LST, Zero)
Method (_INI, 0, NotSerialized) // _INI: Initialize
{
Store (U2PD, UST) /* \_SB_.PCI0.LPCB.SIO2.UST_ */
Store (LPD, LST) /* \_SB_.PCI0.LPCB.SIO2.LST_ */
}
Device (LPBI)
{
Name (_HID, EisaId ("PNP0400") /* Standard LPT Parallel Port */) // _HID: Hardware ID
Name (_UID, 0x02) // _UID: Unique ID
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (LNot (GP14))
{
Return (Zero)
}
If (LNot (LLPT))
{
Return (Zero)
}
If (LNot (LPTP))
{
Return (Zero)
}
Acquire (S1K, 0xFFFF)
ENFG ()
If (LNotEqual (LMD, Zero))
{
Store (Zero, Local1)
}
Else
{
If (LNotEqual (LEMD, Zero))
{
Store (Zero, Local1)
}
Else
{
If (LNotEqual (LST, Zero))
{
Store (0x0F, Local1)
}
Else
{
Store (Zero, Local1)
}
}
}
EXFG ()
Release (S1K)
Return (Local1)
}
Method (_DIS, 0, NotSerialized) // _DIS: Disable Device
{
Acquire (S1K, 0xFFFF)
ENFG ()
Store (Zero, LPD) /* \_SB_.PCI0.LPCB.SIO2.LPD_ */
EXFG ()
Release (S1K)
}
Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
{
Name (RSRC, ResourceTemplate ()
{
IO (Decode16,
0x0000, // Range Minimum
0x0000, // Range Maximum
0x08, // Alignment
0x08, // Length
_Y16)
IRQNoFlags (_Y17)
{}
})
CreateByteField (RSRC, \_SB.PCI0.LPCB.SIO2.LPBI._CRS._Y16._MIN, IO1) // _MIN: Minimum Base Address
CreateByteField (RSRC, 0x03, IO2)
CreateByteField (RSRC, \_SB.PCI0.LPCB.SIO2.LPBI._CRS._Y16._MAX, IO3) // _MAX: Maximum Base Address
CreateByteField (RSRC, 0x05, IO4)
CreateWordField (RSRC, \_SB.PCI0.LPCB.SIO2.LPBI._CRS._Y17._INT, IRQV) // _INT: Interrupts
Acquire (S1K, 0xFFFF)
ENFG ()
If (And (LEqual (LMD, Zero), LEqual (LEMD, Zero)))
{
If (LNotEqual (CR23, Zero))
{
ShiftLeft (CR23, 0x02, Local0)
Store (Local0, IO1) /* \_SB_.PCI0.LPCB.SIO2.LPBI._CRS.IO1_ */
Store (Local0, IO3) /* \_SB_.PCI0.LPCB.SIO2.LPBI._CRS.IO3_ */
ShiftRight (CR23, 0x06, Local0)
Store (Local0, IO2) /* \_SB_.PCI0.LPCB.SIO2.LPBI._CRS.IO2_ */
Store (Local0, IO4) /* \_SB_.PCI0.LPCB.SIO2.LPBI._CRS.IO4_ */
Store (One, Local0)
And (LIRQ, 0x0F, Local1)
ShiftLeft (Local0, Local1, IRQV) /* \_SB_.PCI0.LPCB.SIO2.LPBI._CRS.IRQV */
}
}
EXFG ()
Release (S1K)
Return (RSRC) /* \_SB_.PCI0.LPCB.SIO2.LPBI._CRS.RSRC */
}
Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings
{
StartDependentFnNoPri ()
{
IO (Decode16,
0x0378, // Range Minimum
0x0378, // Range Maximum
0x08, // Alignment
0x08, // Length
)
IRQNoFlags ()
{7}
}
StartDependentFnNoPri ()
{
IO (Decode16,
0x0378, // Range Minimum
0x0378, // Range Maximum
0x08, // Alignment
0x08, // Length
)
IRQNoFlags ()
{5}
}
StartDependentFnNoPri ()
{
IO (Decode16,
0x0278, // Range Minimum
0x0278, // Range Maximum
0x08, // Alignment
0x08, // Length
)
IRQNoFlags ()
{7}
}
StartDependentFnNoPri ()
{
IO (Decode16,
0x0278, // Range Minimum
0x0278, // Range Maximum
0x08, // Alignment
0x08, // Length
)
IRQNoFlags ()
{5}
}
StartDependentFnNoPri ()
{
IO (Decode16,
0x03BC, // Range Minimum
0x03BC, // Range Maximum
0x01, // Alignment
0x03, // Length
)
IRQNoFlags ()
{7}
}
StartDependentFnNoPri ()
{
IO (Decode16,
0x03BC, // Range Minimum
0x03BC, // Range Maximum
0x01, // Alignment
0x03, // Length
)
IRQNoFlags ()
{5}
}
EndDependentFn ()
})
Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings
{
CreateByteField (Arg0, 0x02, IO1)
CreateByteField (Arg0, 0x03, IO2)
CreateWordField (Arg0, 0x09, IRQV)
Acquire (S1K, 0xFFFF)
ENFG ()
ShiftRight (IO1, 0x02, Local0)
ShiftLeft (IO2, 0x06, Local1)
Or (Local0, Local1, Local0)
Store (Local0, CR23) /* \_SB_.PCI0.LPCB.SIO2.CR23 */
FindSetRightBit (IRQV, Local0)
Subtract (Local0, One, Local0)
And (LIRQ, 0xF0, Local1)
Or (Local0, Local1, LIRQ) /* \_SB_.PCI0.LPCB.SIO2.LIRQ */
Store (One, LPD) /* \_SB_.PCI0.LPCB.SIO2.LPD_ */
Store (Zero, LMD) /* \_SB_.PCI0.LPCB.SIO2.LMD_ */
Store (Zero, LEMD) /* \_SB_.PCI0.LPCB.SIO2.LEMD */
EXFG ()
And (IOD1, 0xFC, IOD1) /* \_SB_.PCI0.LPCB.IOD1 */
If (LEqual (IO2, 0x03))
{
If (LEqual (IO1, 0x78))
{
Or (IOD1, Zero, IOD1) /* \_SB_.PCI0.LPCB.IOD1 */
}
Else
{
Or (IOD1, 0x02, IOD1) /* \_SB_.PCI0.LPCB.IOD1 */
}
}
Else
{
Or (IOD1, One, IOD1) /* \_SB_.PCI0.LPCB.IOD1 */
}
Release (S1K)
}
}
Device (ECP)
{
Name (_HID, EisaId ("PNP0401") /* ECP Parallel Port */) // _HID: Hardware ID
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (LNot (GP14))
{
Return (Zero)
}
If (LNot (LLPT))
{
Return (Zero)
}
If (LNot (LPTP))
{
Return (Zero)
}
Acquire (S1K, 0xFFFF)
ENFG ()
If (LNotEqual (LMD, Zero))
{
Store (Zero, Local1)
}
Else
{
If (LNotEqual (LEMD, 0x02))
{
Store (Zero, Local1)
}
Else
{
If (LNotEqual (LST, Zero))
{
Store (0x0F, Local1)
}
Else
{
Store (Zero, Local1)
}
}
}
EXFG ()
Release (S1K)
Return (Local1)
}
Method (_DIS, 0, NotSerialized) // _DIS: Disable Device
{
Acquire (S1K, 0xFFFF)
ENFG ()
Store (Zero, LPD) /* \_SB_.PCI0.LPCB.SIO2.LPD_ */
EXFG ()
Release (S1K)
}
Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
{
Name (RSRC, ResourceTemplate ()
{
IO (Decode16,
0x0000, // Range Minimum
0x0000, // Range Maximum
0x08, // Alignment
0x08, // Length
_Y18)
IO (Decode16,
0x0000, // Range Minimum
0x0000, // Range Maximum
0x08, // Alignment
0x08, // Length
_Y19)
IRQNoFlags (_Y1A)
{}
DMA (Compatibility, NotBusMaster, Transfer16, _Y1B)
{}
})
CreateByteField (RSRC, \_SB.PCI0.LPCB.SIO2.ECP._CRS._Y18._MIN, IO1) // _MIN: Minimum Base Address
CreateByteField (RSRC, 0x03, IO2)
CreateByteField (RSRC, \_SB.PCI0.LPCB.SIO2.ECP._CRS._Y18._MAX, IO3) // _MAX: Maximum Base Address
CreateByteField (RSRC, 0x05, IO4)
CreateByteField (RSRC, \_SB.PCI0.LPCB.SIO2.ECP._CRS._Y18._ALN, ALB1) // _ALN: Alignment
CreateByteField (RSRC, \_SB.PCI0.LPCB.SIO2.ECP._CRS._Y18._LEN, LNB1) // _LEN: Length
CreateByteField (RSRC, \_SB.PCI0.LPCB.SIO2.ECP._CRS._Y19._MIN, IO5) // _MIN: Minimum Base Address
CreateByteField (RSRC, 0x0B, IO6)
CreateByteField (RSRC, \_SB.PCI0.LPCB.SIO2.ECP._CRS._Y19._MAX, IO7) // _MAX: Maximum Base Address
CreateByteField (RSRC, 0x0D, IO8)
CreateByteField (RSRC, \_SB.PCI0.LPCB.SIO2.ECP._CRS._Y19._ALN, ALB2) // _ALN: Alignment
CreateByteField (RSRC, \_SB.PCI0.LPCB.SIO2.ECP._CRS._Y19._LEN, LNB2) // _LEN: Length
CreateWordField (RSRC, \_SB.PCI0.LPCB.SIO2.ECP._CRS._Y1A._INT, IRQV) // _INT: Interrupts
CreateWordField (RSRC, \_SB.PCI0.LPCB.SIO2.ECP._CRS._Y1B._DMA, DMAV) // _DMA: Direct Memory Access
Acquire (S1K, 0xFFFF)
ENFG ()
If (And (LEqual (LMD, Zero), LEqual (LEMD, 0x02)))
{
If (LNotEqual (CR23, Zero))
{
ShiftLeft (CR23, 0x02, Local0)
Store (Local0, IO1) /* \_SB_.PCI0.LPCB.SIO2.ECP_._CRS.IO1_ */
Store (Local0, IO3) /* \_SB_.PCI0.LPCB.SIO2.ECP_._CRS.IO3_ */
Store (Local0, IO5) /* \_SB_.PCI0.LPCB.SIO2.ECP_._CRS.IO5_ */
Store (Local0, IO7) /* \_SB_.PCI0.LPCB.SIO2.ECP_._CRS.IO7_ */
If (LEqual (Local0, 0xBC))
{
Store (One, ALB1) /* \_SB_.PCI0.LPCB.SIO2.ECP_._CRS.ALB1 */
Store (0x03, LNB1) /* \_SB_.PCI0.LPCB.SIO2.ECP_._CRS.LNB1 */
Store (One, ALB2) /* \_SB_.PCI0.LPCB.SIO2.ECP_._CRS.ALB2 */
Store (0x03, LNB2) /* \_SB_.PCI0.LPCB.SIO2.ECP_._CRS.LNB2 */
}
ShiftRight (CR23, 0x06, Local0)
Store (Local0, IO2) /* \_SB_.PCI0.LPCB.SIO2.ECP_._CRS.IO2_ */
Store (Local0, IO4) /* \_SB_.PCI0.LPCB.SIO2.ECP_._CRS.IO4_ */
Add (Local0, 0x04, IO6) /* \_SB_.PCI0.LPCB.SIO2.ECP_._CRS.IO6_ */
Add (Local0, 0x04, IO8) /* \_SB_.PCI0.LPCB.SIO2.ECP_._CRS.IO8_ */
And (LIRQ, 0x0F, Local0)
ShiftLeft (One, Local0, IRQV) /* \_SB_.PCI0.LPCB.SIO2.ECP_._CRS.IRQV */
And (LDMA, 0x0F, Local0)
ShiftLeft (One, Local0, DMAV) /* \_SB_.PCI0.LPCB.SIO2.ECP_._CRS.DMAV */
}
}
EXFG ()
Release (S1K)
Return (RSRC) /* \_SB_.PCI0.LPCB.SIO2.ECP_._CRS.RSRC */
}
Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings
{
StartDependentFnNoPri ()
{
IO (Decode16,
0x0378, // Range Minimum
0x0378, // Range Maximum
0x08, // Alignment
0x08, // Length
)
IO (Decode16,
0x0778, // Range Minimum
0x0778, // Range Maximum
0x08, // Alignment
0x08, // Length
)
IRQ (Edge, ActiveHigh, Exclusive, )
{7}
DMA (Compatibility, NotBusMaster, Transfer16, )
{1,3}
}
StartDependentFnNoPri ()
{
IO (Decode16,
0x0378, // Range Minimum
0x0378, // Range Maximum
0x08, // Alignment
0x08, // Length
)
IO (Decode16,
0x0778, // Range Minimum
0x0778, // Range Maximum
0x08, // Alignment
0x08, // Length
)
IRQ (Edge, ActiveHigh, Exclusive, )
{5}
DMA (Compatibility, NotBusMaster, Transfer16, )
{1,3}
}
StartDependentFnNoPri ()
{
IO (Decode16,
0x0278, // Range Minimum
0x0278, // Range Maximum
0x08, // Alignment
0x08, // Length
)
IO (Decode16,
0x0678, // Range Minimum
0x0678, // Range Maximum
0x08, // Alignment
0x08, // Length
)
IRQ (Edge, ActiveHigh, Exclusive, )
{7}
DMA (Compatibility, NotBusMaster, Transfer16, )
{1,3}
}
StartDependentFnNoPri ()
{
IO (Decode16,
0x0278, // Range Minimum
0x0278, // Range Maximum
0x08, // Alignment
0x08, // Length
)
IO (Decode16,
0x0678, // Range Minimum
0x0678, // Range Maximum
0x08, // Alignment
0x08, // Length
)
IRQ (Edge, ActiveHigh, Exclusive, )
{5}
DMA (Compatibility, NotBusMaster, Transfer16, )
{1,3}
}
StartDependentFnNoPri ()
{
IO (Decode16,
0x03BC, // Range Minimum
0x03BC, // Range Maximum
0x01, // Alignment
0x03, // Length
)
IO (Decode16,
0x07BC, // Range Minimum
0x07BC, // Range Maximum
0x01, // Alignment
0x03, // Length
)
IRQ (Edge, ActiveHigh, Exclusive, )
{7}
DMA (Compatibility, NotBusMaster, Transfer16, )
{1,3}
}
StartDependentFnNoPri ()
{
IO (Decode16,
0x03BC, // Range Minimum
0x03BC, // Range Maximum
0x01, // Alignment
0x03, // Length
)
IO (Decode16,
0x07BC, // Range Minimum
0x07BC, // Range Maximum
0x01, // Alignment
0x03, // Length
)
IRQ (Edge, ActiveHigh, Exclusive, )
{5}
DMA (Compatibility, NotBusMaster, Transfer16, )
{1,3}
}
EndDependentFn ()
})
Method (_SRS, 1, NotSerialized) // _SRS: Set Resource Settings
{
CreateByteField (Arg0, 0x02, IO1)
CreateByteField (Arg0, 0x03, IO2)
CreateWordField (Arg0, 0x11, IRQV)
CreateWordField (Arg0, 0x14, DMAV)
Acquire (S1K, 0xFFFF)
ENFG ()
ShiftRight (IO1, 0x02, Local0)
ShiftLeft (IO2, 0x06, Local1)
Or (Local0, Local1, Local0)
Store (Local0, CR23) /* \_SB_.PCI0.LPCB.SIO2.CR23 */
FindSetRightBit (IRQV, Local0)
Subtract (Local0, One, Local0)
And (LIRQ, 0xF0, Local1)
Or (Local0, Local1, LIRQ) /* \_SB_.PCI0.LPCB.SIO2.LIRQ */
FindSetRightBit (DMAV, Local0)
Subtract (Local0, One, Local0)
And (LIRQ, 0xF0, Local1)
Or (Local0, Local1, LIRQ) /* \_SB_.PCI0.LPCB.SIO2.LIRQ */
Store (One, LPD) /* \_SB_.PCI0.LPCB.SIO2.LPD_ */
Store (Zero, LMD) /* \_SB_.PCI0.LPCB.SIO2.LMD_ */
Store (0x02, LEMD) /* \_SB_.PCI0.LPCB.SIO2.LEMD */
EXFG ()
And (IOD1, 0xFC, IOD1) /* \_SB_.PCI0.LPCB.IOD1 */
If (LEqual (IO2, 0x03))
{
If (LEqual (IO1, 0x78))
{
Or (IOD1, Zero, IOD1) /* \_SB_.PCI0.LPCB.IOD1 */
}
Else
{
Or (IOD1, 0x02, IOD1) /* \_SB_.PCI0.LPCB.IOD1 */
}
}
Else
{
Or (IOD1, One, IOD1) /* \_SB_.PCI0.LPCB.IOD1 */
}
Release (S1K)
}
}
}
Device (PS2K)
{
Name (_HID, EisaId ("PNP0303") /* IBM Enhanced Keyboard (101/102-key, PS/2 Mouse) */) // _HID: Hardware ID
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
{
IO (Decode16,
0x0060, // Range Minimum
0x0060, // Range Maximum
0x01, // Alignment
0x01, // Length
)
IO (Decode16,
0x0064, // Range Minimum
0x0064, // Range Maximum
0x01, // Alignment
0x01, // Length
)
IRQ (Edge, ActiveHigh, Exclusive, )
{1}
})
}
Device (PS2M)
{
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (LUXP)
{
Return (Zero)
}
Else
{
Return (0x0F)
}
}
Name (_HID, EisaId ("SYN1902")) // _HID: Hardware ID
Name (_CID, Package (0x03) // _CID: Compatible ID
{
EisaId ("SYN1900"),
EisaId ("SYN0002"),
EisaId ("PNP0F13") /* PS/2 Mouse */
})
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
{
IRQ (Edge, ActiveHigh, Exclusive, )
{12}
})
}
Device (PS2J)
{
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (LUXP)
{
Return (0x0F)
}
Else
{
Return (Zero)
}
}
Name (_HID, EisaId ("SYN1903")) // _HID: Hardware ID
Name (_CID, Package (0x03) // _CID: Compatible ID
{
EisaId ("SYN1900"),
EisaId ("SYN0002"),
EisaId ("PNP0F13") /* PS/2 Mouse */
})
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
{
IRQ (Edge, ActiveHigh, Exclusive, )
{12}
})
}
}
Device (PATA)
{
Name (_ADR, 0x001F0001) // _ADR: Address
OperationRegion (PACS, PCI_Config, 0x40, 0xC0)
Field (PACS, DWordAcc, NoLock, Preserve)
{
PRIT, 16,
Offset (0x04),
PSIT, 4,
Offset (0x08),
SYNC, 4,
Offset (0x0A),
SDT0, 2,
, 2,
SDT1, 2,
Offset (0x14),
ICR0, 4,
ICR1, 4,
ICR2, 4,
ICR3, 4,
ICR4, 4,
ICR5, 4
}
Device (PRID)
{
Name (_ADR, Zero) // _ADR: Address
Method (_GTM, 0, NotSerialized) // _GTM: Get Timing Mode
{
Name (PBUF, Buffer (0x14)
{
/* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ........ */
/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ........ */
/* 0010 */ 0x00, 0x00, 0x00, 0x00 /* .... */
})
CreateDWordField (PBUF, Zero, PIO0)
CreateDWordField (PBUF, 0x04, DMA0)
CreateDWordField (PBUF, 0x08, PIO1)
CreateDWordField (PBUF, 0x0C, DMA1)
CreateDWordField (PBUF, 0x10, FLAG)
Store (GETP (PRIT), PIO0) /* \_SB_.PCI0.PATA.PRID._GTM.PIO0 */
Store (GDMA (And (SYNC, One), And (ICR3, One),
And (ICR0, One), SDT0, And (ICR1, One)), DMA0) /* \_SB_.PCI0.PATA.PRID._GTM.DMA0 */
If (LEqual (DMA0, Ones))
{
Store (PIO0, DMA0) /* \_SB_.PCI0.PATA.PRID._GTM.DMA0 */
}
If (And (PRIT, 0x4000))
{
If (LEqual (And (PRIT, 0x90), 0x80))
{
Store (0x0384, PIO1) /* \_SB_.PCI0.PATA.PRID._GTM.PIO1 */
}
Else
{
Store (GETT (PSIT), PIO1) /* \_SB_.PCI0.PATA.PRID._GTM.PIO1 */
}
}
Else
{
Store (Ones, PIO1) /* \_SB_.PCI0.PATA.PRID._GTM.PIO1 */
}
Store (GDMA (And (SYNC, 0x02), And (ICR3, 0x02),
And (ICR0, 0x02), SDT1, And (ICR1, 0x02)), DMA1) /* \_SB_.PCI0.PATA.PRID._GTM.DMA1 */
If (LEqual (DMA1, Ones))
{
Store (PIO1, DMA1) /* \_SB_.PCI0.PATA.PRID._GTM.DMA1 */
}
Store (GETF (And (SYNC, One), And (SYNC, 0x02),
PRIT), FLAG) /* \_SB_.PCI0.PATA.PRID._GTM.FLAG */
If (And (LEqual (PIO0, Ones), LEqual (DMA0, Ones)))
{
Store (0x78, PIO0) /* \_SB_.PCI0.PATA.PRID._GTM.PIO0 */
Store (0x14, DMA0) /* \_SB_.PCI0.PATA.PRID._GTM.DMA0 */
Store (0x03, FLAG) /* \_SB_.PCI0.PATA.PRID._GTM.FLAG */
}
Return (PBUF) /* \_SB_.PCI0.PATA.PRID._GTM.PBUF */
}
Method (_STM, 3, NotSerialized) // _STM: Set Timing Mode
{
CreateDWordField (Arg0, Zero, PIO0)
CreateDWordField (Arg0, 0x04, DMA0)
CreateDWordField (Arg0, 0x08, PIO1)
CreateDWordField (Arg0, 0x0C, DMA1)
CreateDWordField (Arg0, 0x10, FLAG)
If (LEqual (SizeOf (Arg1), 0x0200))
{
And (PRIT, 0x40F0, PRIT) /* \_SB_.PCI0.PATA.PRIT */
And (SYNC, 0x02, SYNC) /* \_SB_.PCI0.PATA.SYNC */
Store (Zero, SDT0) /* \_SB_.PCI0.PATA.SDT0 */
And (ICR0, 0x02, ICR0) /* \_SB_.PCI0.PATA.ICR0 */
And (ICR1, 0x02, ICR1) /* \_SB_.PCI0.PATA.ICR1 */
And (ICR3, 0x02, ICR3) /* \_SB_.PCI0.PATA.ICR3 */
And (ICR5, 0x02, ICR5) /* \_SB_.PCI0.PATA.ICR5 */
CreateWordField (Arg1, 0x62, W490)
CreateWordField (Arg1, 0x6A, W530)
CreateWordField (Arg1, 0x7E, W630)
CreateWordField (Arg1, 0x80, W640)
CreateWordField (Arg1, 0xB0, W880)
CreateWordField (Arg1, 0xBA, W930)
Or (PRIT, 0x8004, PRIT) /* \_SB_.PCI0.PATA.PRIT */
If (LAnd (And (FLAG, 0x02), And (W490, 0x0800)))
{
Or (PRIT, 0x02, PRIT) /* \_SB_.PCI0.PATA.PRIT */
}
Or (PRIT, SETP (PIO0, W530, W640), PRIT) /* \_SB_.PCI0.PATA.PRIT */
If (And (FLAG, One))
{
Or (SYNC, One, SYNC) /* \_SB_.PCI0.PATA.SYNC */
Store (SDMA (DMA0), SDT0) /* \_SB_.PCI0.PATA.SDT0 */
If (LLess (DMA0, 0x1E))
{
Or (ICR3, One, ICR3) /* \_SB_.PCI0.PATA.ICR3 */
}
If (LLess (DMA0, 0x3C))
{
Or (ICR0, One, ICR0) /* \_SB_.PCI0.PATA.ICR0 */
}
If (And (W930, 0x2000))
{
Or (ICR1, One, ICR1) /* \_SB_.PCI0.PATA.ICR1 */
}
}
}
If (LEqual (SizeOf (Arg2), 0x0200))
{
And (PRIT, 0x3F0F, PRIT) /* \_SB_.PCI0.PATA.PRIT */
Store (Zero, PSIT) /* \_SB_.PCI0.PATA.PSIT */
And (SYNC, One, SYNC) /* \_SB_.PCI0.PATA.SYNC */
Store (Zero, SDT1) /* \_SB_.PCI0.PATA.SDT1 */
And (ICR0, One, ICR0) /* \_SB_.PCI0.PATA.ICR0 */
And (ICR1, One, ICR1) /* \_SB_.PCI0.PATA.ICR1 */
And (ICR3, One, ICR3) /* \_SB_.PCI0.PATA.ICR3 */
And (ICR5, One, ICR5) /* \_SB_.PCI0.PATA.ICR5 */
CreateWordField (Arg2, 0x62, W491)
CreateWordField (Arg2, 0x6A, W531)
CreateWordField (Arg2, 0x7E, W631)
CreateWordField (Arg2, 0x80, W641)
CreateWordField (Arg2, 0xB0, W881)
CreateWordField (Arg2, 0xBA, W931)
Or (PRIT, 0x8040, PRIT) /* \_SB_.PCI0.PATA.PRIT */
If (LAnd (And (FLAG, 0x08), And (W491, 0x0800)))
{
Or (PRIT, 0x20, PRIT) /* \_SB_.PCI0.PATA.PRIT */
}
If (And (FLAG, 0x10))
{
Or (PRIT, 0x4000, PRIT) /* \_SB_.PCI0.PATA.PRIT */
If (LGreater (PIO1, 0xF0))
{
Or (PRIT, 0x80, PRIT) /* \_SB_.PCI0.PATA.PRIT */
}
Else
{
Or (PRIT, 0x10, PRIT) /* \_SB_.PCI0.PATA.PRIT */
Store (SETT (PIO1, W531, W641), PSIT) /* \_SB_.PCI0.PATA.PSIT */
}
}
If (And (FLAG, 0x04))
{
Or (SYNC, 0x02, SYNC) /* \_SB_.PCI0.PATA.SYNC */
Store (SDMA (DMA1), SDT1) /* \_SB_.PCI0.PATA.SDT1 */
If (LLess (DMA1, 0x1E))
{
Or (ICR3, 0x02, ICR3) /* \_SB_.PCI0.PATA.ICR3 */
}
If (LLess (DMA1, 0x3C))
{
Or (ICR0, 0x02, ICR0) /* \_SB_.PCI0.PATA.ICR0 */
}
If (And (W931, 0x2000))
{
Or (ICR1, 0x02, ICR1) /* \_SB_.PCI0.PATA.ICR1 */
}
}
}
}
Device (P_D0)
{
Name (_ADR, Zero) // _ADR: Address
Method (_GTF, 0, NotSerialized) // _GTF: Get Task File
{
Name (PIB0, Buffer (0x0E)
{
/* 0000 */ 0x03, 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF, 0x03, /* ........ */
/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xA0, 0xEF /* ...... */
})
CreateByteField (PIB0, One, PMD0)
CreateByteField (PIB0, 0x08, DMD0)
If (And (PRIT, 0x02))
{
If (LEqual (And (PRIT, 0x09), 0x08))
{
Store (0x08, PMD0) /* \_SB_.PCI0.PATA.PRID.P_D0._GTF.PMD0 */
}
Else
{
Store (0x0A, PMD0) /* \_SB_.PCI0.PATA.PRID.P_D0._GTF.PMD0 */
ShiftRight (And (PRIT, 0x0300), 0x08, Local0)
ShiftRight (And (PRIT, 0x3000), 0x0C, Local1)
Add (Local0, Local1, Local2)
If (LEqual (0x03, Local2))
{
Store (0x0B, PMD0) /* \_SB_.PCI0.PATA.PRID.P_D0._GTF.PMD0 */
}
If (LEqual (0x05, Local2))
{
Store (0x0C, PMD0) /* \_SB_.PCI0.PATA.PRID.P_D0._GTF.PMD0 */
}
}
}
Else
{
Store (One, PMD0) /* \_SB_.PCI0.PATA.PRID.P_D0._GTF.PMD0 */
}
If (And (SYNC, One))
{
Store (Or (SDT0, 0x40), DMD0) /* \_SB_.PCI0.PATA.PRID.P_D0._GTF.DMD0 */
If (And (ICR1, One))
{
If (And (ICR0, One))
{
Add (DMD0, 0x02, DMD0) /* \_SB_.PCI0.PATA.PRID.P_D0._GTF.DMD0 */
}
If (And (ICR3, One))
{
Store (0x45, DMD0) /* \_SB_.PCI0.PATA.PRID.P_D0._GTF.DMD0 */
}
}
}
Else
{
Or (Subtract (And (PMD0, 0x07), 0x02), 0x20, DMD0) /* \_SB_.PCI0.PATA.PRID.P_D0._GTF.DMD0 */
}
Return (PIB0) /* \_SB_.PCI0.PATA.PRID.P_D0._GTF.PIB0 */
}
}
Device (P_D1)
{
Name (_ADR, One) // _ADR: Address
Method (_GTF, 0, NotSerialized) // _GTF: Get Task File
{
Name (PIB1, Buffer (0x0E)
{
/* 0000 */ 0x03, 0x00, 0x00, 0x00, 0x00, 0xB0, 0xEF, 0x03, /* ........ */
/* 0008 */ 0x00, 0x00, 0x00, 0x00, 0xB0, 0xEF /* ...... */
})
CreateByteField (PIB1, One, PMD1)
CreateByteField (PIB1, 0x08, DMD1)
If (And (PRIT, 0x20))
{
If (LEqual (And (PRIT, 0x90), 0x80))
{
Store (0x08, PMD1) /* \_SB_.PCI0.PATA.PRID.P_D1._GTF.PMD1 */
}
Else
{
Add (And (PSIT, 0x03), ShiftRight (And (PSIT, 0x0C),
0x02), Local0)
If (LEqual (0x05, Local0))
{
Store (0x0C, PMD1) /* \_SB_.PCI0.PATA.PRID.P_D1._GTF.PMD1 */
}
Else
{
If (LEqual (0x03, Local0))
{
Store (0x0B, PMD1) /* \_SB_.PCI0.PATA.PRID.P_D1._GTF.PMD1 */
}
Else
{
Store (0x0A, PMD1) /* \_SB_.PCI0.PATA.PRID.P_D1._GTF.PMD1 */
}
}
}
}
Else
{
Store (One, PMD1) /* \_SB_.PCI0.PATA.PRID.P_D1._GTF.PMD1 */
}
If (And (SYNC, 0x02))
{
Store (Or (SDT1, 0x40), DMD1) /* \_SB_.PCI0.PATA.PRID.P_D1._GTF.DMD1 */
If (And (ICR1, 0x02))
{
If (And (ICR0, 0x02))
{
Add (DMD1, 0x02, DMD1) /* \_SB_.PCI0.PATA.PRID.P_D1._GTF.DMD1 */
}
If (And (ICR3, 0x02))
{
Store (0x45, DMD1) /* \_SB_.PCI0.PATA.PRID.P_D1._GTF.DMD1 */
}
}
}
Else
{
Or (Subtract (And (PMD1, 0x07), 0x02), 0x20, DMD1) /* \_SB_.PCI0.PATA.PRID.P_D1._GTF.DMD1 */
}
Return (PIB1) /* \_SB_.PCI0.PATA.PRID.P_D1._GTF.PIB1 */
}
}
}
}
Device (SATA)
{
Name (_ADR, 0x001F0002) // _ADR: Address
OperationRegion (SACS, PCI_Config, 0x40, 0xC0)
Field (SACS, DWordAcc, NoLock, Preserve)
{
PRIT, 16,
SECT, 16,
PSIT, 4,
SSIT, 4,
Offset (0x08),
SYNC, 4,
Offset (0x0A),
SDT0, 2,
, 2,
SDT1, 2,
Offset (0x0B),
SDT2, 2,
, 2,
SDT3, 2,
Offset (0x14),
ICR0, 4,
ICR1, 4,
ICR2, 4,
ICR3, 4,
ICR4, 4,
ICR5, 4,
Offset (0x50),
MAPV, 2
}
}
Device (SBUS)
{
Name (_ADR, 0x001F0003) // _ADR: Address
OperationRegion (SMBP, PCI_Config, 0x40, 0xC0)
Field (SMBP, DWordAcc, NoLock, Preserve)
{
, 2,
I2CE, 1
}
OperationRegion (SMBI, SystemIO, 0x18C0, 0x10)
Field (SMBI, ByteAcc, NoLock, Preserve)
{
HSTS, 8,
Offset (0x02),
HCON, 8,
HCOM, 8,
TXSA, 8,
DAT0, 8,
DAT1, 8,
HBDR, 8,
PECR, 8,
RXSA, 8,
SDAT, 16
}
Method (SSXB, 2, Serialized)
{
If (STRT ())
{
Return (Zero)
}
Store (Zero, I2CE) /* \_SB_.PCI0.SBUS.I2CE */
Store (0xBF, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
Store (Arg0, TXSA) /* \_SB_.PCI0.SBUS.TXSA */
Store (Arg1, HCOM) /* \_SB_.PCI0.SBUS.HCOM */
Store (0x48, HCON) /* \_SB_.PCI0.SBUS.HCON */
If (COMP ())
{
Or (HSTS, 0xFF, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
Return (One)
}
Return (Zero)
}
Method (SRXB, 1, Serialized)
{
If (STRT ())
{
Return (0xFFFF)
}
Store (Zero, I2CE) /* \_SB_.PCI0.SBUS.I2CE */
Store (0xBF, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
Store (Or (Arg0, One), TXSA) /* \_SB_.PCI0.SBUS.TXSA */
Store (0x44, HCON) /* \_SB_.PCI0.SBUS.HCON */
If (COMP ())
{
Or (HSTS, 0xFF, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
Return (DAT0) /* \_SB_.PCI0.SBUS.DAT0 */
}
Return (0xFFFF)
}
Method (SWRB, 3, Serialized)
{
If (STRT ())
{
Return (Zero)
}
Store (Zero, I2CE) /* \_SB_.PCI0.SBUS.I2CE */
Store (0xBF, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
Store (Arg0, TXSA) /* \_SB_.PCI0.SBUS.TXSA */
Store (Arg1, HCOM) /* \_SB_.PCI0.SBUS.HCOM */
Store (Arg2, DAT0) /* \_SB_.PCI0.SBUS.DAT0 */
Store (0x48, HCON) /* \_SB_.PCI0.SBUS.HCON */
If (COMP ())
{
Or (HSTS, 0xFF, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
Return (One)
}
Return (Zero)
}
Method (SRDB, 2, Serialized)
{
If (STRT ())
{
Return (0xFFFF)
}
Store (Zero, I2CE) /* \_SB_.PCI0.SBUS.I2CE */
Store (0xBF, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
Store (Or (Arg0, One), TXSA) /* \_SB_.PCI0.SBUS.TXSA */
Store (Arg1, HCOM) /* \_SB_.PCI0.SBUS.HCOM */
Store (0x48, HCON) /* \_SB_.PCI0.SBUS.HCON */
If (COMP ())
{
Or (HSTS, 0xFF, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
Return (DAT0) /* \_SB_.PCI0.SBUS.DAT0 */
}
Return (0xFFFF)
}
Method (SBLW, 4, Serialized)
{
If (STRT ())
{
Return (Zero)
}
Store (Arg3, I2CE) /* \_SB_.PCI0.SBUS.I2CE */
Store (0xBF, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
Store (Arg0, TXSA) /* \_SB_.PCI0.SBUS.TXSA */
Store (Arg1, HCOM) /* \_SB_.PCI0.SBUS.HCOM */
Store (SizeOf (Arg2), DAT0) /* \_SB_.PCI0.SBUS.DAT0 */
Store (Zero, Local1)
Store (DerefOf (Index (Arg2, Zero)), HBDR) /* \_SB_.PCI0.SBUS.HBDR */
Store (0x54, HCON) /* \_SB_.PCI0.SBUS.HCON */
While (LGreater (SizeOf (Arg2), Local1))
{
Store (0x0FA0, Local0)
While (LAnd (LNot (And (HSTS, 0x80)), Local0))
{
Decrement (Local0)
Stall (0x32)
}
If (LNot (Local0))
{
KILL ()
Return (Zero)
}
Store (0x80, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
Increment (Local1)
If (LGreater (SizeOf (Arg2), Local1))
{
Store (DerefOf (Index (Arg2, Local1)), HBDR) /* \_SB_.PCI0.SBUS.HBDR */
}
}
If (COMP ())
{
Or (HSTS, 0xFF, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
Return (One)
}
Return (Zero)
}
Method (SBLR, 3, Serialized)
{
Name (TBUF, Buffer (0x0100) {})
If (STRT ())
{
Return (Zero)
}
Store (Arg2, I2CE) /* \_SB_.PCI0.SBUS.I2CE */
Store (0xBF, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
Store (Or (Arg0, One), TXSA) /* \_SB_.PCI0.SBUS.TXSA */
Store (Arg1, HCOM) /* \_SB_.PCI0.SBUS.HCOM */
Store (0x54, HCON) /* \_SB_.PCI0.SBUS.HCON */
Store (0x0FA0, Local0)
While (LAnd (LNot (And (HSTS, 0x80)), Local0))
{
Decrement (Local0)
Stall (0x32)
}
If (LNot (Local0))
{
KILL ()
Return (Zero)
}
Store (DAT0, Index (TBUF, Zero))
Store (0x80, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
Store (One, Local1)
While (LLess (Local1, DerefOf (Index (TBUF, Zero))))
{
Store (0x0FA0, Local0)
While (LAnd (LNot (And (HSTS, 0x80)), Local0))
{
Decrement (Local0)
Stall (0x32)
}
If (LNot (Local0))
{
KILL ()
Return (Zero)
}
Store (HBDR, Index (TBUF, Local1))
Store (0x80, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
Increment (Local1)
}
If (COMP ())
{
Or (HSTS, 0xFF, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
Return (TBUF) /* \_SB_.PCI0.SBUS.SBLR.TBUF */
}
Return (Zero)
}
Method (STRT, 0, Serialized)
{
Store (0xC8, Local0)
While (Local0)
{
If (And (HSTS, 0x40))
{
Decrement (Local0)
Sleep (One)
If (LEqual (Local0, Zero))
{
Return (One)
}
}
Else
{
Store (Zero, Local0)
}
}
Store (0x0FA0, Local0)
While (Local0)
{
If (And (HSTS, One))
{
Decrement (Local0)
Stall (0x32)
If (LEqual (Local0, Zero))
{
KILL ()
}
}
Else
{
Return (Zero)
}
}
Return (One)
}
Method (COMP, 0, Serialized)
{
Store (0x0FA0, Local0)
While (Local0)
{
If (And (HSTS, 0x02))
{
Return (One)
}
Else
{
Decrement (Local0)
Stall (0x32)
If (LEqual (Local0, Zero))
{
KILL ()
}
}
}
Return (Zero)
}
Method (KILL, 0, Serialized)
{
Or (HCON, 0x02, HCON) /* \_SB_.PCI0.SBUS.HCON */
Or (HSTS, 0xFF, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
}
}
}
Device (HAPS)
{
Name (_HID, "TOS620A") // _HID: Hardware ID
Method (PTLV, 1, NotSerialized)
{
Store (Arg0, PRM0) /* \PRM0 */
Store (0x8E, SMIF) /* \SMIF */
Store (Zero, TRP0) /* \TRP0 */
}
Method (RSSS, 0, NotSerialized)
{
Store (One, ^^PCI0.LPCB.EC0.HDDI) /* \_SB_.PCI0.LPCB.EC0_.HDDI */
}
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (LAnd (RDEC (0xD6), One))
{
Return (0x0F)
}
Else
{
Return (Zero)
}
}
}
Device (BT)
{
Name (_HID, "TOS6205") // _HID: Hardware ID
Method (_STA, 0, NotSerialized) // _STA: Status
{
Store (RDEC (0x93), Local1)
Store (And (Local1, 0x20), Local2)
If (Local2)
{
Store (0x0F, Local0)
}
Else
{
Store (Zero, Local0)
}
Return (Local0)
}
Method (BTST, 0, NotSerialized)
{
Store (Zero, Local0)
Store (^^PCI0.LPCB.EC0.BTST, Local2)
If (Local2)
{
Store (^^PCI0.LPCB.EC0.BTON, Local3)
If (Local3)
{
Or (Local0, 0x80, Local0)
}
Store (^^PCI0.LPCB.EC0.BION, Local4)
If (Local4)
{
Or (Local0, 0x40, Local0)
}
Store (^^PCI0.LPCB.EC0.KSST, Local5)
If (Local5)
{
Or (Local0, One, Local0)
}
}
Return (Local0)
}
Method (AUSB, 0, NotSerialized)
{
If (^^PCI0.LPCB.EC0.ECOK)
{
Store (^^PCI0.LPCB.EC0.BTST, Local2)
If (Local2)
{
Store (^^PCI0.LPCB.EC0.KSST, Local3)
If (Local3) {}
}
}
}
Method (DUSB, 0, NotSerialized)
{
If (^^PCI0.LPCB.EC0.ECOK)
{
Store (^^PCI0.LPCB.EC0.BTST, Local2)
If (Local2)
{
Store (Zero, ^^PCI0.LPCB.EC0.BTON) /* \_SB_.PCI0.LPCB.EC0_.BTON */
Store (Zero, ^^PCI0.LPCB.EC0.BION) /* \_SB_.PCI0.LPCB.EC0_.BION */
Store (Zero, BTRS) /* \BTRS */
Sleep (0x96)
Store (One, BTPW) /* \BTPW */
Store (Zero, PRM0) /* \PRM0 */
Store (0x8E, SMIF) /* \SMIF */
Store (Zero, TRP0) /* \TRP0 */
}
}
}
Method (BTPO, 0, NotSerialized)
{
If (^^PCI0.LPCB.EC0.ECOK)
{
Store (^^PCI0.LPCB.EC0.BTST, Local2)
If (Local2)
{
Store (^^PCI0.LPCB.EC0.KSST, Local3)
If (Local3)
{
Store (One, ^^PCI0.LPCB.EC0.BTON) /* \_SB_.PCI0.LPCB.EC0_.BTON */
Store (One, ^^PCI0.LPCB.EC0.BION) /* \_SB_.PCI0.LPCB.EC0_.BION */
Store (Zero, BTPW) /* \BTPW */
Sleep (0x64)
Store (One, BTRS) /* \BTRS */
Sleep (0x64)
Store (Zero, BTRS) /* \BTRS */
Sleep (0x14)
Store (One, BTRS) /* \BTRS */
Store (One, PRM0) /* \PRM0 */
Store (0x8E, SMIF) /* \SMIF */
Store (Zero, TRP0) /* \TRP0 */
}
}
}
}
Method (BTPF, 0, NotSerialized)
{
If (^^PCI0.LPCB.EC0.ECOK)
{
Store (^^PCI0.LPCB.EC0.BTST, Local2)
If (Local2)
{
Store (Zero, BTRS) /* \BTRS */
Sleep (0x96)
Store (One, BTPW) /* \BTPW */
Sleep (0x64)
}
}
}
}
Device (VALG)
{
Name (_HID, EisaId ("TOS6209")) // _HID: Hardware ID
Name (VUID, One)
Name (_DDN, "VALGeneral") // _DDN: DOS Device Name
Method (_STA, 0, NotSerialized) // _STA: Status
{
If (GP15)
{
Return (0x0B)
}
Else
{
Return (Zero)
}
}
Method (VCID, 0, NotSerialized)
{
If (CKDK ())
{
Store (^^PCI0.LPCB.EC0.DKIF, Local0)
If (LAnd (UNDK, LEqual (Local0, One)))
{
Return (0x1B51F351)
}
Else
{
Return (Zero)
}
}
Else
{
Return (Zero)
}
}
Method (VDCK, 1, NotSerialized)
{
If (LEqual (XDCK (Arg0), One))
{
Return (One)
}
Else
{
Return (Zero)
}
}
Method (VEJ0, 1, NotSerialized)
{
Store (0x02, ^^PCI0.LPCB.EC0.DPPR) /* \_SB_.PCI0.LPCB.EC0_.DPPR */
Sleep (0x14)
Store (Zero, UNDK) /* \_SB_.UNDK */
}
Method (DLSZ, 0, NotSerialized)
{
Return (0x03)
}
Name (T7BF, Buffer (0x30)
{
/* 0000 */ 0x80, 0x00, 0x03, 0x0C, 0x02, 0xEB, 0x00, 0x00, /* ........ */
/* 0008 */ 0x86, 0x80, 0xCB, 0x27, 0x00, 0x00, 0x00, 0x00, /* ...'.... */
/* 0010 */ 0x80, 0x20, 0x03, 0x0C, 0x08, 0xEF, 0x00, 0x00, /* . ...... */
/* 0018 */ 0x86, 0x80, 0xCC, 0x27, 0x00, 0x00, 0x00, 0x00, /* ...'.... */
/* 0020 */ 0x80, 0x10, 0x00, 0x0C, 0x03, 0x31, 0x07, 0x00, /* .....1.. */
/* 0028 */ 0x4C, 0x10, 0x3A, 0x80, 0x00, 0x00, 0x00, 0x00 /* L.:..... */
})
Method (DLIB, 0, NotSerialized)
{
Return (T7BF) /* \_SB_.VALG.T7BF */
}
Method (MDCK, 0, NotSerialized)
{
Store (DKAP, Local0)
Return (Local0)
}
Method (CDCK, 1, NotSerialized)
{
Store (Arg0, Local0)
Store (Local0, DKAP) /* \DKAP */
}
Method (MCNT, 0, NotSerialized)
{
Name (BUFF, Buffer (0x08)
{
0x07, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00 /* ........ */
})
CreateDWordField (BUFF, 0x04, CCNT)
Store (0x91, SMIF) /* \SMIF */
Store (Zero, TRP0) /* \TRP0 */
Store (0x90, SMIF) /* \SMIF */
Store (Zero, TRP0) /* \TRP0 */
If (IGDS)
{
And (CSTE, 0x07, Local1)
Store (DerefOf (Index (MCST, Local1)), CCNT) /* \_SB_.VALG.MCNT.CCNT */
}
Else
{
And (CSTE, 0x0B, Local1)
Store (DerefOf (Index (MCST, Local1)), CCNT) /* \_SB_.VALG.MCNT.CCNT */
}
If (DSMD)
{
Store (0x04, CCNT) /* \_SB_.VALG.MCNT.CCNT */
}
Return (BUFF) /* \_SB_.VALG.MCNT.BUFF */
}
Name (MCST, Package (0x10)
{
One,
One,
One,
0x02,
One,
0x02,
0x02,
0x02,
One,
0x02,
0x02,
0x02,
0x02,
0x02,
0x02,
0x02
})
Name (CSTT, Package (0x10)
{
One,
One,
0x02,
0x04,
0x08,
0x10,
0x20,
0x40,
0x80,
0x0100,
0x0200,
0x0400,
0x0800,
0x1000,
0x2000,
0x4000
})
Name (CATT, Package (0x10)
{
One,
One,
0x02,
0x07,
0x08,
0x19,
0x2A,
0x7F,
0x80,
0x0181,
0x0282,
0x0787,
0x0888,
0x0199,
0x2AAA,
0x7FFF
})
Method (MDSP, 0, NotSerialized)
{
Name (BUFF, Buffer (0x08)
{
0x07, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00 /* ........ */
})
CreateDWordField (BUFF, Zero, ADSP)
CreateDWordField (BUFF, 0x04, CDSP)
Store (0x90, SMIF) /* \SMIF */
Store (Zero, TRP0) /* \TRP0 */
If (IGDS)
{
And (CADL, 0x07, Local0)
Store (DerefOf (Index (CATT, Local0)), ADSP) /* \_SB_.VALG.MDSP.ADSP */
And (CSTE, 0x07, Local1)
Store (DerefOf (Index (CSTT, Local1)), CDSP) /* \_SB_.VALG.MDSP.CDSP */
}
Else
{
And (CADL, 0x0B, Local0)
Store (DerefOf (Index (CATT, Local0)), ADSP) /* \_SB_.VALG.MDSP.ADSP */
And (CSTE, 0x0B, Local1)
Store (DerefOf (Index (CSTT, Local1)), CDSP) /* \_SB_.VALG.MDSP.CDSP */
}
Return (BUFF) /* \_SB_.VALG.MDSP.BUFF */
}
Method (VCHG, 1, NotSerialized)
{
Store (Arg0, Local0)
Store (Arg0, Local1)
Store (Local0, PRM0) /* \PRM0 */
ShiftRight (Local1, 0x08, Local1)
Store (Local1, PRM1) /* \PRM1 */
Store (0x8C, SMIF) /* \SMIF */
Store (Zero, TRP0) /* \TRP0 */
If (IGDS)
{
^^PCI0.GFX0.STBL (PARM)
}
Else
{
If (LEqual (^^PCI0.LPCB.EC0.VGAT, 0x02))
{
^^PCI0.PEGP.VGA.STBL (PARM)
}
}
}
}
Method (XDRV, 0, NotSerialized)
{
If (DKAP)
{
Notify (VALG, 0x83) // Device-Specific Change
If (IGDS)
{
^PCI0.GFX0.STBL (One)
}
Else
{
^PCI0.PEGP.VGA.STBL (One)
}
}
}
Method (XDSP, 0, NotSerialized)
{
If (IGDS)
{
^PCI0.GFX0.STBL (One)
}
Else
{
^PCI0.PEGP.VGA.STBL (One)
}
}
Method (XDCK, 1, NotSerialized)
{
Return (One)
}
Method (XEJB, 0, NotSerialized)
{
Store (^PCI0.LPCB.EC0.DKIF, Local0)
If (Local0)
{
If (DKAP)
{
Notify (VALG, 0x82) // Device-Specific Change
}
}
}
Method (XEJ0, 0, NotSerialized)
{
Store (0x02, ^PCI0.LPCB.EC0.DPPR) /* \_SB_.PCI0.LPCB.EC0_.DPPR */
Sleep (0x14)
Store (Zero, UNDK) /* \_SB_.UNDK */
}
Method (CKDK, 0, NotSerialized)
{
Store (^PCI0.LPCB.EC0.DOCK, Local2)
If (Local2)
{
Return (One)
}
Else
{
Return (Zero)
}
}
}
}Last edited by berniz95 (2017-05-20 12:44:29)
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#8 2017-05-20 13:21:36
- Head_on_a_Stick
- Member
- From: London
- Registered: 2015-09-29
- Posts: 8,759
- Website
Re: Battery on Toshiba laptop
Can we also see:
dmesg | grep ACPIHave you seen https://wiki.archlinux.org/index.php/DSDT?
Much of the advice there seems generally applicable.
“Et ignotas animum dimittit in artes.” — Ovid, Metamorphoses, VIII., 18.
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#9 2017-05-20 13:26:03
- berniz95
- Member
- From: Vauréal France
- Registered: 2016-02-23
- Posts: 50
Re: Battery on Toshiba laptop
I'll have a look at the link in a moment.
Et voilà :
% dmesg | grep ACPI
[ 0.000000] BIOS-e820: [mem 0x000000007fe70000-0x000000007fefffff] ACPI NVS
[ 0.000000] ACPI: Early table checksum verification disabled
[ 0.000000] ACPI: RSDP 0x00000000000F6510 000014 (v00 TOSINV)
[ 0.000000] ACPI: RSDT 0x000000007FE7E1F8 000048 (v01 TOSINV Capell00 06040000 LTP 00000000)
[ 0.000000] ACPI: FACP 0x000000007FE85DEE 000074 (v01 TOSINV CALISTGA 06040000 LOHR 0000005A)
[ 0.000000] ACPI: DSDT 0x000000007FE7F8EF 0064FF (v01 TOSINV CALISTGA 06040000 INTL 20050624)
[ 0.000000] ACPI: FACS 0x000000007FE86FC0 000040
[ 0.000000] ACPI: APIC 0x000000007FE85E62 000068 (v01 INTEL CALISTGA 06040000 LOHR 0000005A)
[ 0.000000] ACPI: HPET 0x000000007FE85ECA 000038 (v01 INTEL CALISTGA 06040000 LOHR 0000005A)
[ 0.000000] ACPI: MCFG 0x000000007FE85F02 00003C (v01 INTEL CALISTGA 06040000 LOHR 0000005A)
[ 0.000000] ACPI: BOOT 0x000000007FE85FD8 000028 (v01 PTLTD $SBFTBL$ 06040000 LTP 00000001)
[ 0.000000] ACPI: APIC 0x000000007FE85F70 000068 (v01 TOSINV APIC 06040000 LTP 00000000)
[ 0.000000] ACPI: SSDT 0x000000007FE7F29C 00064F (v01 SataRe SataPri 00001000 INTL 20050624)
[ 0.000000] ACPI: SSDT 0x000000007FE7EC0A 000692 (v01 SataRe SataSec 00001000 INTL 20050624)
[ 0.000000] ACPI: SSDT 0x000000007FE7E240 0004F6 (v01 PmRef CpuPm 00003000 INTL 20050624)
[ 0.000000] ACPI: BIOS bug: multiple APIC/MADT found, using 0
[ 0.000000] ACPI: If "acpi_apic_instance=2" works better, notify linux-acpi@vger.kernel.org
[ 0.000000] ACPI: Local APIC address 0xfee00000
[ 0.000000] ACPI: PM-Timer IO Port: 0x1008
[ 0.000000] ACPI: Local APIC address 0xfee00000
[ 0.000000] ACPI: LAPIC (acpi_id[0x00] lapic_id[0x00] enabled)
[ 0.000000] ACPI: LAPIC (acpi_id[0x01] lapic_id[0x01] enabled)
[ 0.000000] ACPI: LAPIC_NMI (acpi_id[0x00] high edge lint[0x1])
[ 0.000000] ACPI: LAPIC_NMI (acpi_id[0x01] high edge lint[0x1])
[ 0.000000] ACPI: IOAPIC (id[0x01] address[0xfec00000] gsi_base[0])
[ 0.000000] ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 2 dfl dfl)
[ 0.000000] ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 9 high level)
[ 0.000000] ACPI: IRQ0 used by override.
[ 0.000000] ACPI: IRQ2 used by override.
[ 0.000000] ACPI: IRQ9 used by override.
[ 0.000000] Using ACPI (MADT) for SMP configuration information
[ 0.000000] ACPI: HPET id: 0x8086a201 base: 0xfed00000
[ 0.004034] ACPI: Core revision 20140424
[ 0.004130] ACPI: Forced DSDT copy: length 0x064FF copied locally, original unmapped
[ 0.017745] ACPI: All ACPI Tables successfully acquired
[ 0.088397] PM: Registering ACPI NVS region [mem 0x7fe70000-0x7fefffff] (589824 bytes)
[ 0.089825] ACPI: bus type PCI registered
[ 0.089825] acpiphp: ACPI Hot Plug PCI Controller Driver version: 0.5
[ 0.104095] ACPI: Added _OSI(Module Device)
[ 0.104098] ACPI: Added _OSI(Processor Device)
[ 0.104101] ACPI: Added _OSI(3.0 _SCP Extensions)
[ 0.104104] ACPI: Added _OSI(Processor Aggregator Device)
[ 0.111432] [Firmware Bug]: ACPI: BIOS _OSI(Linux) query ignored
[ 0.112218] ACPI: Dynamic OEM Table Load:
[ 0.112228] ACPI: SSDT 0x00000000F7146000 0001EA (v01 PmRef Cpu0Ist 00003000 INTL 20050624)
[ 0.112846] ACPI: Dynamic OEM Table Load:
[ 0.112853] ACPI: SSDT 0x00000000F71D3E00 0001DC (v01 PmRef Cpu0Cst 00003001 INTL 20050624)
[ 0.113698] ACPI: Dynamic OEM Table Load:
[ 0.113706] ACPI: SSDT 0x00000000F70F5580 000089 (v01 PmRef Cpu1Ist 00003000 INTL 20050624)
[ 0.114273] ACPI: Dynamic OEM Table Load:
[ 0.114280] ACPI: SSDT 0x00000000F70F54C0 000085 (v01 PmRef Cpu1Cst 00003000 INTL 20050624)
[ 0.115192] ACPI: Interpreter enabled
[ 0.115208] ACPI Exception: AE_NOT_FOUND, While evaluating Sleep State [\_S1_] (20140424/hwxface-580)
[ 0.115214] ACPI Exception: AE_NOT_FOUND, While evaluating Sleep State [\_S2_] (20140424/hwxface-580)
[ 0.115235] ACPI: (supports S0 S3 S4 S5)
[ 0.115237] ACPI: Using IOAPIC for interrupt routing
[ 0.115279] PCI: Ignoring host bridge windows from ACPI; if necessary, use "pci=use_crs" and report a bug
[ 0.116661] [Firmware Bug]: ACPI: No _BQC method, cannot determine initial brightness
[ 0.180231] acpi PNP0A05:00: ACPI dock station (docks/bays count: 1)
[ 0.312409] ACPI: Power Resource [FN00] (off)
[ 0.313624] ACPI: PCI Root Bridge [PCI0] (domain 0000 [bus 00-ff])
[ 0.315538] pci 0000:00:1b.0: System wakeup disabled by ACPI
[ 0.317979] pci 0000:00:1f.0: quirk: [io 0x1000-0x107f] claimed by ICH6 ACPI/GPIO/TCO
[ 0.320300] pci 0000:05:00.0: System wakeup disabled by ACPI
[ 0.321702] pci 0000:07:08.0: System wakeup disabled by ACPI
[ 0.352187] ACPI: PCI Interrupt Link [LNKA] (IRQs 1 3 4 5 6 7 10 12 14 15) *11
[ 0.352280] ACPI: PCI Interrupt Link [LNKB] (IRQs 1 3 4 5 6 7 *11 12 14 15)
[ 0.352370] ACPI: PCI Interrupt Link [LNKC] (IRQs 1 3 4 5 6 7 *10 12 14 15)
[ 0.352460] ACPI: PCI Interrupt Link [LNKD] (IRQs 1 3 4 5 6 7 11 12 14 15) *10
[ 0.352550] ACPI: PCI Interrupt Link [LNKE] (IRQs 1 3 4 5 6 7 *10 12 14 15)
[ 0.352639] ACPI: PCI Interrupt Link [LNKF] (IRQs 1 3 4 5 6 7 11 12 14 15) *0, disabled.
[ 0.352730] ACPI: PCI Interrupt Link [LNKG] (IRQs 1 3 4 5 6 7 *10 12 14 15)
[ 0.352819] ACPI: PCI Interrupt Link [LNKH] (IRQs 1 3 4 5 6 7 *11 12 14 15)
[ 0.416304] ACPI: Enabled 8 GPEs in block 00 to 1F
[ 0.416382] ACPI : EC: GPE = 0x16, I/O: command/status = 0x66, data = 0x62
[ 0.416505] PCI: Using ACPI for IRQ routing
[ 0.438398] pnp: PnP ACPI init
[ 0.438427] ACPI: bus type PNP registered
[ 0.438695] system 00:00: Plug and Play ACPI device, IDs PNP0c02 (active)
[ 0.468484] system 00:01: Plug and Play ACPI device, IDs PNP0103 PNP0c01 (active)
[ 0.468622] system 00:02: Plug and Play ACPI device, IDs PNP0c02 (active)
[ 0.468697] pnp 00:03: Plug and Play ACPI device, IDs PNP0b00 (active)
[ 0.468901] pnp 00:04: Plug and Play ACPI device, IDs PNP0303 (active)
[ 0.468989] pnp 00:05: Plug and Play ACPI device, IDs SYN1902 SYN1900 SYN0002 PNP0f13 (active)
[ 0.532156] pnp: PnP ACPI: found 6 devices
[ 0.532159] ACPI: bus type PNP unregistered
[ 0.532166] PnPBIOS: Disabled by ACPI PNP
[ 1.515367] ACPI: bus type USB registered
[ 1.519707] ACPI: Fan [FAN0] (off)
[ 1.523917] ACPI: Thermal Zone [TZ00] (34 C)
[ 1.579060] ACPI: Thermal Zone [TZ01] (30 C)
[ 7.588126] ACPI: acpi_idle registered with cpuidle
[ 7.837355] ACPI: Lid Switch [LID]
[ 7.837566] ACPI: Power Button [PWRB]
[ 7.837833] ACPI: Power Button [PWRF]
[ 7.867724] ACPI: Video Device [VGA] (multi-head: yes rom: no post: no)
[ 8.390338] ACPI: AC Adapter [ADP0] (on-line)
[ 8.611715] ACPI: Battery Slot [BAT0] (battery present)
[ 9.246253] ACPI Warning: SystemIO range 0x0000000000001028-0x000000000000102F conflicts with OpRegion 0x0000000000001000-0x000000000000107F (\PMIO) (20140424/utaddress-254)
[ 9.246267] ACPI: If an ACPI driver is available for this device, you should use it instead of the native driver
[ 9.246273] ACPI Warning: SystemIO range 0x00000000000011B0-0x00000000000011BF conflicts with OpRegion 0x0000000000001180-0x00000000000011BB (\GPIO) (20140424/utaddress-254)
[ 9.246281] ACPI: If an ACPI driver is available for this device, you should use it instead of the native driver
[ 9.246284] ACPI Warning: SystemIO range 0x0000000000001180-0x00000000000011AF conflicts with OpRegion 0x0000000000001180-0x00000000000011BB (\GPIO) (20140424/utaddress-254)
[ 9.246292] ACPI: If an ACPI driver is available for this device, you should use it instead of the native driver
[ 9.313967] ACPI Warning: SystemIO range 0x00000000000018C0-0x00000000000018DF conflicts with OpRegion 0x00000000000018C0-0x00000000000018CF (\_SB_.PCI0.SBUS.SMBI) (20140424/utaddress-254)
[ 9.313989] ACPI: If an ACPI driver is available for this device, you should use it instead of the native driver
[ 3736.822836] e100 0000:07:08.0: System wakeup enabled by ACPI
[ 3737.416634] ACPI: Preparing to enter system sleep state S3
[ 3737.528311] ACPI: Low-level resume complete
[ 3737.541764] ACPI: Waking up from system sleep state S3
[ 3737.645175] e100 0000:07:08.0: System wakeup disabled by ACPI
[ 3737.812280] ata1.00: ACPI cmd ef/03:0c:00:00:00:a0 (SET FEATURES) filtered out
[ 3737.812287] ata1.00: ACPI cmd ef/03:45:00:00:00:a0 (SET FEATURES) filtered out
[ 3737.816591] ata2.00: ACPI cmd ef/03:0c:00:00:00:a0 (SET FEATURES) filtered out
[ 3737.816594] ata2.00: ACPI cmd ef/03:42:00:00:00:a0 (SET FEATURES) filtered outLast edited by berniz95 (2017-05-20 13:29:40)
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#10 2017-05-20 14:03:30
- Head_on_a_Stick
- Member
- From: London
- Registered: 2015-09-29
- Posts: 8,759
- Website
Re: Battery on Toshiba laptop
berniz95 wrote:
[ 0.000000] ACPI: BIOS bug: multiple APIC/MADT found, using 0 [ 0.000000] ACPI: If "acpi_apic_instance=2" works better, notify linux-acpi@vger.kernel.org
^ Try this suggestion.
The parameter can be added temporarily from the GRUB menu by pressing "e" and appending to the line that starts with "linux".
“Et ignotas animum dimittit in artes.” — Ovid, Metamorphoses, VIII., 18.
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#11 2017-05-20 18:48:19
- berniz95
- Member
- From: Vauréal France
- Registered: 2016-02-23
- Posts: 50
Re: Battery on Toshiba laptop
I tried the "acpi_apic_instance=2" and there was no change. Well at least, the first time I tried it the output of the acpi -V changed to "Battery 0: unnkown 0%" which wasn't much better, but now it's back to usual after each reboot.
Last edited by berniz95 (2017-05-20 18:49:01)
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#12 2017-05-20 18:56:30
- damo
- ....moderator....
- Registered: 2015-08-20
- Posts: 6,271
Re: Battery on Toshiba laptop
berniz95 wrote:
I tried the "acpi_apic_instance=2" and there was no change. Well at least, the first time I tried it the output of the acpi -V changed to "Battery 0: unnkown 0%" which wasn't much better, but now it's back to usual after each reboot.
If you want to boot with a kernel parameter, you need to do it every time. Edit '/etc/default/grub' and append your kernel options to the 'GRUB_CMDLINE_LINUX_DEFAULT' line, then update-grub
Be Excellent to Each Other...
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#13 2017-05-20 19:14:47
- Head_on_a_Stick
- Member
- From: London
- Registered: 2015-09-29
- Posts: 8,759
- Website
Re: Battery on Toshiba laptop
berniz95 wrote:
[ 9.246253] ACPI Warning: SystemIO range 0x0000000000001028-0x000000000000102F conflicts with OpRegion 0x0000000000001000-0x000000000000107F (\PMIO) (20140424/utaddress-254) [ 9.246267] ACPI: If an ACPI driver is available for this device, you should use it instead of the native driver [ 9.246273] ACPI Warning: SystemIO range 0x00000000000011B0-0x00000000000011BF conflicts with OpRegion 0x0000000000001180-0x00000000000011BB (\GPIO) (20140424/utaddress-254) [ 9.246281] ACPI: If an ACPI driver is available for this device, you should use it instead of the native driver [ 9.246284] ACPI Warning: SystemIO range 0x0000000000001180-0x00000000000011AF conflicts with OpRegion 0x0000000000001180-0x00000000000011BB (\GPIO) (20140424/utaddress-254) [ 9.246292] ACPI: If an ACPI driver is available for this device, you should use it instead of the native driver [ 9.313967] ACPI Warning: SystemIO range 0x00000000000018C0-0x00000000000018DF conflicts with OpRegion 0x00000000000018C0-0x00000000000018CF (\_SB_.PCI0.SBUS.SMBI) (20140424/utaddress-254) [ 9.313989] ACPI: If an ACPI driver is available for this device, you should use it instead of the native driver
So these are the errors, the OpRegions need to be corrected in the same manner as the link in your OP, I think.
The fields are PMIO, GPIO & _SB_.PCI0.SBUS.SMBI, substitute these values in the DSDT file and recompile.
“Et ignotas animum dimittit in artes.” — Ovid, Metamorphoses, VIII., 18.
Offline
#14 2017-05-21 08:20:09
- berniz95
- Member
- From: Vauréal France
- Registered: 2016-02-23
- Posts: 50
Re: Battery on Toshiba laptop
damo wrote:
berniz95 wrote:I tried the "acpi_apic_instance=2" and there was no change. Well at least, the first time I tried it the output of the acpi -V changed to "Battery 0: unknown 0%" which wasn't much better, but now it's back to usual after each reboot.
If you want to boot with a kernel parameter, you need to do it every time. Edit '/etc/default/grub' and append your kernel options to the 'GRUB_CMDLINE_LINUX_DEFAULT' line, then update-grub
I should have specified: even though I added "acpi_apic_instance=2" at each reboot, the slight change in the battery status appeared only once. Well I will try your hint anyway.
Last edited by berniz95 (2017-05-21 08:47:57)
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#15 2017-05-21 19:19:15
- berniz95
- Member
- From: Vauréal France
- Registered: 2016-02-23
- Posts: 50
Re: Battery on Toshiba laptop
Head_on_a_Stick wrote:
So these are the errors, the OpRegions need to be corrected in the same manner as the link in your OP, I think.
The fields are PMIO, GPIO & _SB_.PCI0.SBUS.SMBI, substitute these values in the DSDT file and recompile.
Well done. I need to document on this OperationRegion function first. In the link, not only the address and length were modified but also the second argument: from "SystemMemory" to "EmbeddedControl", and relocated to address 0x00. I also need to know what new address I can specify without bumping into another useful block. I hope this is not too risky... well no, documenting is not risky.
Last edited by berniz95 (2017-05-21 19:29:42)
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